S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library

CSV information ?

Status archived
Valid from 05.11.2018
Valid until 05.11.2023
Scheme 🇫🇷 FR
Manufacturer Samsung Electronics Co., Ltd.
Category Trusted Computing
Security level AVA_VAN.5, ALC_DVS.2, EAL5+
Protection profiles

Heuristics summary ?

Certificate ID: ANSSI-CC-2018/43

Certificate ?

Certification report ?

Extracted keywords

Symmetric Algorithms
AES, DES, Triple-DES
Asymmetric Algorithms
ECC
Randomness
DTRNG

Vendor
Samsung

Security level
EAL 5, EAL2, EAL7, EAL 1, EAL 3, EAL 7, ITSEC E6 Elevé
Security Assurance Requirements (SAR)
ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_OPE, AGD_PRE, ALC_DVS.2, ALC_FLR, ALC_CMC, ALC_CMS, ALC_DEL, ALC_DVS, ALC_TAT, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VAN.5, AVA_VAN, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_REQ, ASE_SPD, ASE_TSS
Protection profiles
BSI-CC-PP-0035-2007, BSI-PP-0035-2007
Certificates
ANSSI-CC-2018/43, ANSSI-CC-2017/16
Evaluation facilities
CESTI, CEA - LETI, CEA-LETI

Standards
AIS 31, CCMB-2017-04-001, CCMB-2017-04-002, CCMB-2017-04-003, CCMB-2017-04-004

File metadata

Title ANSSI-CC-2018/43
Subject Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software
Keywords ANSSI-CC-CER-F-07.026
Creation date D:20181120145904+01'00'
Modification date D:20181127163721+01'00'
Pages 18
Creator Acrobat PDFMaker 11 pour Word
Producer Adobe PDF Library 11.0

Frontpage

Certificate ID ANSSI-CC-2018/43
Certified item Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software
Certification lab CEA - LETI 17 avenue des martyrs, 38054 Grenoble Cedex 9, France
Developer Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, Corée du Sud Commanditaire Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, Corée du Sud

References

Outgoing
  • ANSSI-CC-2017/16 - archived - SAMSUNG S3FV9QM / S3FV9QK rĂ©fĂ©rence : S3FV9QM/S3FV9QK rev3_TRCv1.0_PKALibv1.4-GUIv1.38a_DTRNGlibv2.0/3.0-Iv1.2_BLv2.1/2.2-GUI1.2_BLv2.6-GUIv1.2.7_DOC-UMv1.11-SANv1.5-CDSv3.2
Incoming
  • ANSSI-CC-2021/02 - active - Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software RĂ©fĂ©rence : S3FV9QM_20200504

Security target ?

Extracted keywords

Symmetric Algorithms
AES, DES, TDES, 3DES, Triple-DES, TDEA, HMAC
Asymmetric Algorithms
RSA-CRT, ECDH, ECDSA, ECC, Diffie-Hellman, DSA
Hash functions
SHA1, SHA224, SHA256, SHA384, SHA512
Schemes
Key Agreement
Protocols
PGP
Randomness
DTRNG, TRNG, RND, RNG
Elliptic Curves
P-192, P-224, P-256, P-384, P-521, secp192k1, secp192r1, secp224k1, secp224r1, secp256k1, secp256r1, secp384r1, secp521r1, brainpoolP192r1, brainpoolP192t1, brainpoolP224r1, brainpoolP224t1, brainpoolP256r1, brainpoolP256t1, brainpoolP320r1, brainpoolP320t1, brainpoolP384r1, brainpoolP384t1, brainpoolP512r1, brainpoolP512t1
Block cipher modes
ECB

CPLC
IC Version
Vendor
Samsung

Security level
EAL5, EAL 4, EAL 5, EAL5 augmented, EAL 4 augmented, EAL 5 augmented
Claims
O.RNG, O.RND, O.MEM_ACCESS, T.RND
Security Assurance Requirements (SAR)
ADV_ARV, ADV_FSP, ADV_IMP, ADV_VAN, ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, ADV_FSP.4, ADV_TDS.3, AGD_OPE, AGD_PRE, AGD_OPE.1, AGD_PRE.1, ALC_DVS.2, ALC_DEL, ALC_DVS, ALC_CMS, ALC_CMC, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_LCD.1, ALC_TAT.2, ALC_DVS.1, ALC_CMS.4, ATE_COV, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, ATE_DPT.1, AVA_VAN.5, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_SAS, FAU_GEN, FAU_SAS.1, FAU_SAS.1.1, FAU_GEN.1, FCS_RNG, FCS_RNG.1, FCS_RNG.1.1, FCS_RNG.1.2, FCS_COP.1, FCS_COP, FCS_CKM.1, FCS_CKM.4, FCS_CKM, FCS_CKM.2, FDP_ACF, FDP_ITT.1, FDP_ITT.1.1, FDP_ACC.1, FDP_IFC.1, FDP_IFC.1.1, FDP_IFF.1, FDP_ACF.1, FDP_ACC.1.1, FDP_ACF.1.1, FDP_ACF.1.2, FDP_ACF.1.3, FDP_ACF.1.4, FDP_ITC.1, FDP_ITC.2, FDP_SDI.1, FDP_ACC, FDP_IFC, FDP_ITT, FMT_LIM, FMT_LIM.1, FMT_LIM.2, FMT_LIM.1.1, FMT_LIM.2.1, FMT_MSA.3, FMT_MSA.1, FMT_MSA.3.1, FMT_MSA.3.2, FMT_SMR.1, FMT_MSA.1.1, FMT_SMF.1, FMT_SMF.1.1, FMT_CKM.4, FMT_MSA, FMT_SMF, FPT_FLS.1, FPT_FLS.1.1, FPT_PHP.3, FPT_PHP.3.1, FPT_PHP, FPT_ITT.1, FPT_ITT.1.1, FPT_FLS, FPT_ITT, FRU_FLT.2, FRU_FLT.1, FRU_FLT
Protection profiles
BSI-PP-0035

Side-channel analysis
Leak-Inherent, Physical Probing, physical probing, Physical probing, side-channel, side channel, DPA, SPA, timing attacks, timing attack, physical tampering, Malfunction, malfunction, DFA, reverse engineering

Standards
FIPS PUB 180-3, FIPS 197, BSI-AIS31, AIS31, AIS 31, CCMB-2017-04-001, CCMB-2017-04-004, CCMB-2017-04-002, CCMB-2017-04-003

File metadata

Title Security Target
Creation date D:20180606113443+09'00'
Modification date D:20181127163657+01'00'
Pages 72
Creator Microsoft® Word 2010
Producer Microsoft® Word 2010

Heuristics ?

Certificate ID: ANSSI-CC-2018/43

Extracted SARs

ASE_CCL.1, ALC_DEL.1, ADV_FSP.5, ALC_CMC.4, ALC_CMS.5, ALC_DVS.2, AVA_VAN.5, ATE_FUN.1, ATE_IND.2, ALC_TAT.2, ASE_TSS.1, ADV_ARC.1, ASE_SPD.1, ASE_REQ.2, ADV_INT.2, ADV_IMP.1, ADV_TDS.4, ATE_COV.2, AGD_OPE.1, ASE_ECD.1, ASE_INT.1, AGD_PRE.1, ALC_LCD.1, ATE_DPT.3, ASE_OBJ.2

Similar certificates

Name Certificate ID
Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software Référence : S3FV9QM_20200504 ANSSI-CC-2021/02 Compare
Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software (Référence : S3FV9QM_20220504, Version 3) ANSSI-CC-2021/02-R01 Compare
S3NSN4V 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure RSA/SHA Livrary including specific IC Dedicated software ANSSI-CC-2020/32 Compare
S3K170A /S3K140A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure RSA and ECC Library including specific IC Dedicated software ANSSI-CC-2017/12 Compare
S3FT9MF/S3FT9MT/S3FT9MS 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated software ANSSI-CC-2018/31 Compare
S3K250A /S3K232A /S3K212A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure RSA and ECC Library including specific IC Dedicated software ANSSI-CC-2017/13 Compare
S3FT9PE Samsung 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries, including specific IC Dedicated Software, version S3FT9PE_20190329 ANSSI-CC-2019/19 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional CE1 Secure RSA/ECC/SHA Library including specific IC Dedicated Software ANSSI-CC-2020/12 Compare
S3FV9RR/S3FV9RQ/S3FV9RP/S3FV9RK 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure RSA/SHA Library including specific IC Dedicated software ANSSI-CC-2018/40 Compare
S3FT9MF/S3FT9MT/S3FT9MS 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated software(S3FT9MF_20221219) ANSSI-CC-2023/09 Compare
Samsung S3FT9PE 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software (révision 0) ANSSI-CC-2018/26 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional CE1 Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software (S3FT9MH_20220713) ANSSI-CC-2023/20 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional CE1 Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software(S3FT9MH_20200702) ANSSI-CC-2020/93 Compare
S3FT9PF/S3FT9PT/S3FT9PS Samsung 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries, including specific IC Dedicated Software, version S3FT9PF_20190329 ANSSI-CC-2019/18 Compare
S3FT9MF/S3FT9MT/S3FT9MS 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated software (Revision 1 & 2) ANSSI-CC-2019/22 Compare
S3FT9MF/S3FT9MT/S3FT9MS 16-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated software (Reference : S3FT9MF_20191219, Revision 1 & 2) ANSSI-CC-2020/06 Compare
S3D350A/S3D300A/S3D264A/ S3D232A/ S3D200A/ S3K350A/ S3K300A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure RSA and ECC Library including specific IC Dedicated software, revision 2 ANSSI-CC-2017/53 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional CE1 Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software (S3FT9MH_20230713) (ANSSI-CC-2023/20-R01) ANSSI-CC-2023/20-R01 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional Secure RSA and ECC Library ANSSI-CC-2015/66 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional Secure RSA and ECC Library including specific IC Dedicated Software ANSSI-CC-2016/59 Compare
S3FT9MH/S3FT9MV/S3FT9MG 16-bit RISC Microcontroller for Smart Card with optional Secure RSA and ECC Library including specific IC Dedicated Software ANSSI-CC-2017/24 Compare
S3FT9MF/S3FT9MT/S3FT9MS 16-bit RISC Microcontroller for Smart Card with optional Secure/CM1 RSA and ECC Library including specific IC Dedicated Software ANSSI-CC-2016/65 Compare
Samsung S3CT9KW 16-bit RISC Microcontroller for Smart Card, Revision 0 with optional secure RSA/ECC V1.0 Library including specific IC Dedicated Software BSI-DSZ-CC-0639-2010 Compare
S3D350A /S3D300A /S3D264A /S3D232A/S3D200A /S3K350A /S3K300A 32-bit RISC Microcontroller for Smart Card with optionalAT1 Secure RSA and ECC Library including specific IC Dedicated software ANSSI-CC-2017/11 Compare
Samsung S3CT9P3 16-Bit RISC Microcontroller for Smart Cards, Revision 0 with optional Secure RSA and ECC Library (Version 2.0) including specific IC Dedicated Software BSI-DSZ-CC-0801-2012 Compare
Samsung S3FT9PF/ S3FT9PT/ S3FT9PS 16-bit ISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Libraries including specific IC Dedicated Software (révision 0) ANSSI-CC-2018/25 Compare
Samsung S3CC9LC 16-bit RISC Microcontroller for Smart Card, Revision 9 with optional secure RSA 3.7S and ECC 2.4S Libraries including specific IC Dedicated Software BSI-DSZ-CC-0624-2010 Compare
S3FV5RP, S3FV5RK, S3FV5RJ, S3FV5RH 32-Bit RISC Microcontroller for Smart Cards, Revision 0 with optional Secure ECC Library (Version 1.01) including specific IC Dedicated Software BSI-DSZ-CC-0910-2016 Compare
Samsung S3CT9KA / S3CT9K7 / S3CT9K3 16-bit RISC Microcontroller for Smart Card, Revision 1 with optional Secure RSA/ECC Library Version 1.0 including specific IC Dedicated Software BSI-DSZ-CC-0719-V2-2016 Compare
Samsung S3CT9PC / S3CT9PA / S3CT9P7 16-bit RISC Microcontroller for Smart Card, Revision 1 with optional Secure RSA/ECC Library Version 2.0 including specific IC Dedicated Software BSI-DSZ-CC-0720-2011 Compare
Samsung S3CT9KA / S3CT9K7 / S3CT9K3 16-bit RISC Microcontroller for Smart Card, Revision 0 with optional Secure RSA/ECC Library Version 1.0 including specific IC Dedicated Software BSI-DSZ-CC-0719-2011 Compare
Samsung S3CT9PC / S3CT9PA / S3CT9P7 16-bit RISC Microcontroller for Smart Card, Revision 1 with optional Secure RSA/ECC Library Version 2.0 including specific IC Dedicated Software BSI-DSZ-CC-0720-V2-2016 Compare
S3K170A / S3K140A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC ANSSI-CC-2019/60 Compare
S3K170A / S3K140A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2019/02 Compare
S3D350A / S3D300A / S3D264A / S3D232A / S3D200A / S3K350A / S3K300A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries ANSSI-CC-2021/03 Compare
S3K170A /S3K140A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2018/13 Compare
S3CC91A 16-bit RISC Microcontroller for Smart Card, Revision 7 with optional Secure RSA Crypto Library and specific IC Dedicated Software BSI-DSZ-CC-0581-2009 Compare
S3K250A /S3K232A /S3K212A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2019/03 Compare
S3K170A / S3K140A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software version S3K170A_20201028 ANSSI-CC-2021/04 Compare
S3K200B / S3K170B / S3K140B 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software version S3K200B_20201112 ANSSI-CC-2021/06 Compare
S3K250A / S3K232A / S3K212A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software version S3K250A_20201028 ANSSI-CC-2021/05 Compare
S3K250A / S3K232A / S3K212A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software, Version S3K250A_20191028 ANSSI-CC-2019/61 Compare
S3K200B/S3K170B/S3K140B 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software, Version S3K200B_20190930 ANSSI-CC-2019/51 Compare
S3FV9RR/S3FV9RQ/S3FV9RP/S3FV9RK 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure Libraries including specific IC Dedicated software Référence : S3FV9RR_20210407 ANSSI-CC-2021/34 Compare
S3FV9RR/S3FV9RQ/S3FV9RP/S3FV9RK 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure Libraries including specific IC Dedicated software (Référence: S3FV9RR_20220407) ANSSI-CC-2021/34 Compare
S3FV9RR/S3FV9RQ/S3FV9RP/S3FV9RK 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure Libraries including specific IC Dedicated software (Référence : S3FV9RR_20200925) ANSSI-CC-2021/09 Compare
S3D350A / S3D300A / S3D264A / S3D232A / S3D200A / S3K350A / S3K300A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2018/12 Compare
S3D350A / S3D300A / S3D264A / S3D232A / S3D200A / S3K350A / S3K300A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2019/01 Compare
S3D350A / S3D300A / S3D264A / S3D232A / S3D200A / S3K350A / S3K300A 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2019/59 Compare
S3FV9RR/S3FV9RQ/S3FV9RP/S3FV9RK 32-bit RISC Microcontroller for Smart Card with optional AE1 Secure Libraries including specific IC Dedicated software Revision 0 & 1 ANSSI-CC-2020/71 Compare
S3D384C/ S3D352C/ S3D300C/ S3D264C/ S3D232C/ S3K384C 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software Version S3D384C_20210620 ANSSI-CC-2021/37 Compare
S3D384C/ S3D352C/ S3D300C/ S3D264C/ S3D232C/ S3K384C 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software(Version S3D384C_20201120) ANSSI-CC-2021/08 Compare
S3D384C/ S3D352C/ S3D300C/ S3D264C/ S3D232C/ S3K384C 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software(Version S3D384C_20200820) ANSSI-CC-2021/01 Compare
S3D384C/ S3D352C/ S3D300C/ S3D264C/ S3D232C/ S3K384C 32-bit RISC Microcontroller for Smart Card with optional AT1 Secure Libraries including specific IC Dedicated software Version S3D384C_20200515 ANSSI-CC-2020/94 Compare
Secure Element S3B512C/SC3512C (32-bit RISC Microcontroller) with optional ATP1 Secure Library and Fingerprint Library including specific IC Dedicated software ANSSI-CC-2022/63 Compare
Secure Element S3B512C/SC3512C (32-bit RISC Microcontroller) with optional AT1 Secure Library and Fingerprint Library including specific IC Dedicated software ANSSI-CC-2021/62-R01 Compare
Secure Element S3B512C/SC3512C (32-bit RISC Microcontroller) with optional AT1 Secure Library and Fingerprint Library including specific IC Dedicated software (Référence S3B512C_20210830) ANSSI-CC-2021/62 Compare
S3K250A /S3K232A /S3K212A 32-bit RISC Microcontroller for Smart Cardwith optional AT1 Secure Libraries including specific IC Dedicated software ANSSI-CC-2018/14 Compare
Showing 5 out of 58.

Scheme data ?

Product Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library
Url https://cyber.gouv.fr/produits-certifies/samsung-s3fv9qms3fv9qk-32-bit-risc-microcontroller-smart-card-optional-secure
Description Le produit évalué est « Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software, revision 3 » développé par SAMSUNG ELECTRONICS CO LTD.. Le microcontrôleur seul n’est pas un produit utilisable en tant que tel. Il est destiné à héberger une ou plusieurs applications. Il peut être inséré dans un support p
Sponsor Samsung Electronics Co Ltd.
Developer Samsung Electronics Co Ltd.
Cert Id ANSSI-CC-2018/43
Level EAL5+
Enhanced
Cert Id ANSSI-CC-2018/43
Certification Date 05.11.2018
Category Micro-circuits
Cc Version Critères Communs version 3.1r5
Developer Samsung Electronics Co Ltd.
Sponsor Samsung Electronics Co Ltd.
Evaluation Facility CEA-LETI
Level EAL5+
Protection Profile PP0035
Mutual Recognition SOG-IS CCRA
Augmented ALC_DVS.2, AVA_VAN.5
Report Link https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cc-2018-43fr.pdf
Target Link https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cible-2018_43en.pdf

References ?

Updates ?

  • 09.11.2024 The certificate data changed.
    Certificate changed

    The computed heuristics were updated.

    • The scheme_data property was updated, with the {'description': 'Le produit Ă©valuĂ© est « Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software, revision 3 » dĂ©veloppĂ© par SAMSUNG ELECTRONICS CO LTD.. Le microcontrĂ´leur seul n’est pas un produit utilisable en tant que tel. Il est destinĂ© Ă  hĂ©berger une ou plusieurs applications. Il peut ĂŞtre insĂ©rĂ© dans un support p', 'cert_id': 'ANSSI-CC-2018/43', 'enhanced': {'__update__': {'cert_id': 'ANSSI-CC-2018/43', 'certification_date': '2018-11-05', 'mutual_recognition': 'SOG-IS CCRA'}}} data.
  • 17.10.2024 The certificate data changed.
    Certificate changed

    The Protection Profiles of the certificate were updated.

    • The new value is {'_type': 'Set', 'elements': [{'_type': 'sec_certs.sample.protection_profile.ProtectionProfile', 'pp_name': 'Security IC Platform Protection Profile, Version 1.0', 'pp_eal': 'EAL4+', 'pp_link': 'https://www.commoncriteriaportal.org/files/ppfiles/pp0035b.pdf', 'pp_ids': {'_type': 'Set', 'elements': ['SECURITY_IC_V1.0', 'PKISKPP']}}]}.
  • 14.10.2024 The certificate data changed.
    Certificate changed

    The computed heuristics were updated.

    • The scheme_data property was set to {'product': 'Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library', 'url': 'https://cyber.gouv.fr/produits-certifies/samsung-s3fv9qms3fv9qk-32-bit-risc-microcontroller-smart-card-optional-secure', 'description': 'Le produit Ă©valuĂ© est « Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software, revision 3 » dĂ©veloppĂ© par SAMSUNG ELECTRONICS CO LTD..\n\nLe microcontrĂ´leur seul n’est pas un produit utilisable en tant que tel. Il est destinĂ© Ă  hĂ©berger une ou plusieurs applications. Il peut ĂŞtre insĂ©rĂ© dans un support p', 'sponsor': 'Samsung Electronics Co Ltd.', 'developer': 'Samsung Electronics Co Ltd.', 'cert_id': '2018/43', 'level': 'EAL5+', 'enhanced': {'cert_id': '2018/43', 'certification_date': '05/11/2018', 'category': 'Micro-circuits', 'cc_version': 'Critères Communs version 3.1r5', 'developer': 'Samsung Electronics Co Ltd.', 'sponsor': 'Samsung Electronics Co Ltd.', 'evaluation_facility': 'CEA-LETI', 'level': 'EAL5+', 'protection_profile': 'PP0035', 'mutual_recognition': 'SOG-IS\n CCRA', 'augmented': 'ALC_DVS.2, AVA_VAN.5', 'report_link': 'https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cc-2018-43fr.pdf', 'target_link': 'https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cible-2018_43en.pdf'}}.
  • 02.09.2024 The certificate data changed.
    Certificate changed

    The computed heuristics were updated.

    • The scheme_data property was set to None.
  • 22.08.2024 The certificate data changed.
    Certificate changed

    The state of the certificate object was updated.

    • The report property was updated, with the {'download_ok': True, 'convert_ok': True, 'extract_ok': True, 'pdf_hash': '96d7b8c13466763d53fde6f14a492826bb5742617ec3cf617ff0c40e8bb4d808', 'txt_hash': '9d9f9d55566313b38fcb696193fdb8c2b8bc22f0439366cdf3234d59394ae06b'} data.
    • The st property was updated, with the {'download_ok': True, 'convert_ok': True, 'extract_ok': True, 'pdf_hash': 'a24ceefba9de94750b0af50780db7051031e5a89165e7597eb02b64a12bfda46', 'txt_hash': '921ac62127478cf4d031b6c72791638d5d8d06fa6e857b389e025a065de5379d'} data.

    The PDF extraction data was updated.

    • The report_metadata property was set to {'pdf_file_size_bytes': 336598, 'pdf_is_encrypted': False, 'pdf_number_of_pages': 18, '/Category': 'revision 3', '/Comments': 'Samsung Electronics Co Ltd.', '/Company': 'SGDSN/ANSSI', '/CreationDate': "D:20181120145904+01'00'", '/Creator': 'Acrobat PDFMaker 11 pour Word', '/Keywords': 'ANSSI-CC-CER-F-07.026', '/ModDate': "D:20181127163721+01'00'", '/Producer': 'Adobe PDF Library 11.0', '/SourceModified': 'D:20181120135900', '/Subject': 'Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software', '/Title': 'ANSSI-CC-2018/43', 'pdf_hyperlinks': {'_type': 'Set', 'elements': ['mailto:[email protected]', 'http://www.ssi.gouv.fr/']}}.
    • The st_metadata property was set to {'pdf_file_size_bytes': 834408, 'pdf_is_encrypted': False, 'pdf_number_of_pages': 72, '/CreationDate': "D:20180606113443+09'00'", '/Creator': 'Microsoft® Word 2010', '/ModDate': "D:20181127163657+01'00'", '/Producer': 'Microsoft® Word 2010', '/Title': 'Security Target', 'pdf_hyperlinks': {'_type': 'Set', 'elements': ['http://www.ecc-brainpool.org/']}}.
    • The report_frontpage property was set to {'FR': {'match_rules': ['RĂ©fĂ©rence du rapport de certification(.+)Nom du produit(.+)RĂ©fĂ©rence/version du produit(.+)ConformitĂ© Ă  un profil de protection(.+)Critères d’évaluation et version(.+)Niveau d’évaluation(.+)DĂ©veloppeur (.+)Centre d’évaluation(.+)Accords de reconnaissance applicables'], 'cert_id': 'ANSSI-CC-2018/43', 'cert_item': 'Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software', 'cert_item_version': 'revision 3', 'ref_protection_profiles': 'Security IC Platform Protection Profile, version 1.0, certifiĂ© BSI-CC-PP-0035-2007 le 23 aoĂ»t 2007', 'cc_version': 'Critères Communs version 3.1 rĂ©vision 5', 'cc_security_level': 'EAL 5 augmentĂ© ALC_DVS.2, AVA_VAN.5', 'developer': 'Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, CorĂ©e du Sud Commanditaire Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, CorĂ©e du Sud', 'cert_lab': 'CEA - LETI 17 avenue des martyrs, 38054 Grenoble Cedex 9, France'}}.
    • The report_keywords property was set to {'cc_cert_id': {'FR': {'ANSSI-CC-2018/43': 19, 'ANSSI-CC-2017/16': 1}}, 'cc_protection_profile_id': {'BSI': {'BSI-CC-PP-0035-2007': 1, 'BSI-PP-0035-2007': 1}}, 'cc_security_level': {'EAL': {'EAL 5': 3, 'EAL2': 2, 'EAL7': 1, 'EAL 1': 1, 'EAL 3': 1, 'EAL 7': 1}, 'ITSEC': {'ITSEC E6 ElevĂ©': 1}}, 'cc_sar': {'ADV': {'ADV_ARC': 1, 'ADV_FSP': 1, 'ADV_IMP': 1, 'ADV_INT': 1, 'ADV_SPM': 1, 'ADV_TDS': 1}, 'AGD': {'AGD_OPE': 1, 'AGD_PRE': 1}, 'ALC': {'ALC_DVS.2': 2, 'ALC_FLR': 2, 'ALC_CMC': 2, 'ALC_CMS': 1, 'ALC_DEL': 1, 'ALC_DVS': 1, 'ALC_TAT': 1}, 'ATE': {'ATE_COV': 1, 'ATE_DPT': 1, 'ATE_FUN': 1, 'ATE_IND': 1}, 'AVA': {'AVA_VAN.5': 3, 'AVA_VAN': 2}, 'ASE': {'ASE_CCL': 1, 'ASE_ECD': 1, 'ASE_INT': 1, 'ASE_OBJ': 1, 'ASE_REQ': 1, 'ASE_SPD': 1, 'ASE_TSS': 1}}, 'cc_sfr': {}, 'cc_claims': {}, 'vendor': {'Samsung': {'Samsung': 19}}, 'eval_facility': {'CESTI': {'CESTI': 3}, 'CEA-LETI': {'CEA - LETI': 1, 'CEA-LETI': 1}}, 'symmetric_crypto': {'AES_competition': {'AES': {'AES': 1}}, 'DES': {'DES': {'DES': 1}, '3DES': {'Triple-DES': 1}}}, 'asymmetric_crypto': {'ECC': {'ECC': {'ECC': 1}}}, 'pq_crypto': {}, 'hash_function': {}, 'crypto_scheme': {}, 'crypto_protocol': {}, 'randomness': {'TRNG': {'DTRNG': 6}}, 'cipher_mode': {}, 'ecc_curve': {}, 'crypto_engine': {}, 'tls_cipher_suite': {}, 'crypto_library': {}, 'vulnerability': {}, 'side_channel_analysis': {}, 'technical_report_id': {}, 'device_model': {}, 'tee_name': {}, 'os_name': {}, 'cplc_data': {}, 'ic_data_group': {}, 'standard_id': {'BSI': {'AIS 31': 2}, 'CC': {'CCMB-2017-04-001': 1, 'CCMB-2017-04-002': 1, 'CCMB-2017-04-003': 1, 'CCMB-2017-04-004': 1}}, 'javacard_version': {}, 'javacard_api_const': {}, 'javacard_packages': {}, 'certification_process': {}}.
    • The st_keywords property was set to {'cc_cert_id': {}, 'cc_protection_profile_id': {'BSI': {'BSI-PP-0035': 5}}, 'cc_security_level': {'EAL': {'EAL5': 6, 'EAL 4': 1, 'EAL 5': 2, 'EAL5 augmented': 1, 'EAL 4 augmented': 1, 'EAL 5 augmented': 2}}, 'cc_sar': {'ADV': {'ADV_ARV': 1, 'ADV_FSP': 2, 'ADV_IMP': 1, 'ADV_VAN': 1, 'ADV_ARC.1': 7, 'ADV_FSP.5': 3, 'ADV_IMP.1': 2, 'ADV_INT.2': 1, 'ADV_TDS.4': 1, 'ADV_FSP.4': 2, 'ADV_TDS.3': 1}, 'AGD': {'AGD_OPE': 1, 'AGD_PRE': 1, 'AGD_OPE.1': 2, 'AGD_PRE.1': 2}, 'ALC': {'ALC_DVS.2': 7, 'ALC_DEL': 1, 'ALC_DVS': 1, 'ALC_CMS': 2, 'ALC_CMC': 1, 'ALC_CMC.4': 1, 'ALC_CMS.5': 3, 'ALC_DEL.1': 1, 'ALC_LCD.1': 1, 'ALC_TAT.2': 1, 'ALC_DVS.1': 1, 'ALC_CMS.4': 1}, 'ATE': {'ATE_COV': 1, 'ATE_COV.2': 1, 'ATE_DPT.3': 1, 'ATE_FUN.1': 1, 'ATE_IND.2': 1, 'ATE_DPT.1': 1}, 'AVA': {'AVA_VAN.5': 13}, 'ASE': {'ASE_CCL.1': 1, 'ASE_ECD.1': 1, 'ASE_INT.1': 1, 'ASE_OBJ.2': 1, 'ASE_REQ.2': 1, 'ASE_SPD.1': 1, 'ASE_TSS.1': 1}}, 'cc_sfr': {'FAU': {'FAU_SAS': 8, 'FAU_GEN': 2, 'FAU_SAS.1': 12, 'FAU_SAS.1.1': 2, 'FAU_GEN.1': 1}, 'FCS': {'FCS_RNG': 6, 'FCS_RNG.1': 14, 'FCS_RNG.1.1': 2, 'FCS_RNG.1.2': 2, 'FCS_COP.1': 27, 'FCS_COP': 33, 'FCS_CKM.1': 30, 'FCS_CKM.4': 14, 'FCS_CKM': 9, 'FCS_CKM.2': 4}, 'FDP': {'FDP_ACF': 2, 'FDP_ITT.1': 17, 'FDP_ITT.1.1': 1, 'FDP_ACC.1': 14, 'FDP_IFC.1': 18, 'FDP_IFC.1.1': 1, 'FDP_IFF.1': 3, 'FDP_ACF.1': 10, 'FDP_ACC.1.1': 1, 'FDP_ACF.1.1': 1, 'FDP_ACF.1.2': 1, 'FDP_ACF.1.3': 1, 'FDP_ACF.1.4': 1, 'FDP_ITC.1': 11, 'FDP_ITC.2': 11, 'FDP_SDI.1': 1, 'FDP_ACC': 1, 'FDP_IFC': 1, 'FDP_ITT': 1}, 'FMT': {'FMT_LIM': 8, 'FMT_LIM.1': 24, 'FMT_LIM.2': 28, 'FMT_LIM.1.1': 2, 'FMT_LIM.2.1': 2, 'FMT_MSA.3': 13, 'FMT_MSA.1': 12, 'FMT_MSA.3.1': 1, 'FMT_MSA.3.2': 1, 'FMT_SMR.1': 6, 'FMT_MSA.1.1': 1, 'FMT_SMF.1': 9, 'FMT_SMF.1.1': 1, 'FMT_CKM.4': 1, 'FMT_MSA': 2, 'FMT_SMF': 1}, 'FPT': {'FPT_FLS.1': 22, 'FPT_FLS.1.1': 1, 'FPT_PHP.3': 20, 'FPT_PHP.3.1': 1, 'FPT_PHP': 3, 'FPT_ITT.1': 15, 'FPT_ITT.1.1': 1, 'FPT_FLS': 1, 'FPT_ITT': 1}, 'FRU': {'FRU_FLT.2': 17, 'FRU_FLT.1': 1, 'FRU_FLT': 1}}, 'cc_claims': {'O': {'O.RNG': 1, 'O.RND': 5, 'O.MEM_ACCESS': 1}, 'T': {'T.RND': 5}}, 'vendor': {'Samsung': {'Samsung': 3}}, 'eval_facility': {}, 'symmetric_crypto': {'AES_competition': {'AES': {'AES': 13}}, 'DES': {'DES': {'DES': 8}, '3DES': {'TDES': 1, '3DES': 6, 'Triple-DES': 1, 'TDEA': 1}}, 'constructions': {'MAC': {'HMAC': 2}}}, 'asymmetric_crypto': {'RSA': {'RSA-CRT': 1}, 'ECC': {'ECDH': {'ECDH': 6}, 'ECDSA': {'ECDSA': 12}, 'ECC': {'ECC': 23}}, 'FF': {'DH': {'Diffie-Hellman': 2}, 'DSA': {'DSA': 2}}}, 'pq_crypto': {}, 'hash_function': {'SHA': {'SHA1': {'SHA1': 2}, 'SHA2': {'SHA224': 6, 'SHA256': 6, 'SHA384': 6, 'SHA512': 5}}}, 'crypto_scheme': {'KA': {'Key Agreement': 2}}, 'crypto_protocol': {'PGP': {'PGP': 2}}, 'randomness': {'TRNG': {'DTRNG': 20, 'TRNG': 4}, 'RNG': {'RND': 10, 'RNG': 3}}, 'cipher_mode': {'ECB': {'ECB': 3}}, 'ecc_curve': {'NIST': {'P-192': 8, 'P-224': 8, 'P-256': 8, 'P-384': 8, 'P-521': 4, 'secp192k1': 4, 'secp192r1': 4, 'secp224k1': 4, 'secp224r1': 4, 'secp256k1': 4, 'secp256r1': 4, 'secp384r1': 4, 'secp521r1': 4}, 'Brainpool': {'brainpoolP192r1': 4, 'brainpoolP192t1': 4, 'brainpoolP224r1': 4, 'brainpoolP224t1': 4, 'brainpoolP256r1': 4, 'brainpoolP256t1': 4, 'brainpoolP320r1': 4, 'brainpoolP320t1': 4, 'brainpoolP384r1': 4, 'brainpoolP384t1': 4, 'brainpoolP512r1': 4, 'brainpoolP512t1': 4}}, 'crypto_engine': {}, 'tls_cipher_suite': {}, 'crypto_library': {}, 'vulnerability': {}, 'side_channel_analysis': {'SCA': {'Leak-Inherent': 23, 'Physical Probing': 4, 'physical probing': 9, 'Physical probing': 2, 'side-channel': 4, 'side channel': 1, 'DPA': 8, 'SPA': 7, 'timing attacks': 1, 'timing attack': 2}, 'FI': {'physical tampering': 2, 'Malfunction': 27, 'malfunction': 11, 'DFA': 4}, 'other': {'reverse engineering': 5}}, 'technical_report_id': {}, 'device_model': {}, 'tee_name': {}, 'os_name': {}, 'cplc_data': {'ICVersion': {'IC Version': 1}}, 'ic_data_group': {}, 'standard_id': {'FIPS': {'FIPS PUB 180-3': 6, 'FIPS 197': 1}, 'BSI': {'BSI-AIS31': 3, 'AIS31': 4, 'AIS 31': 1}, 'CC': {'CCMB-2017-04-001': 3, 'CCMB-2017-04-004': 3, 'CCMB-2017-04-002': 2, 'CCMB-2017-04-003': 2}}, 'javacard_version': {}, 'javacard_api_const': {}, 'javacard_packages': {}, 'certification_process': {}}.
    • The report_filename property was set to anssi-cc-2018-43fr.pdf.
    • The st_filename property was set to anssi-cible-2018_43en.pdf.

    The computed heuristics were updated.

    • The cert_lab property was set to ['CEA'].
    • The cert_id property was set to ANSSI-CC-2018/43.
    • The report_references property was updated, with the {'directly_referenced_by': {'_type': 'Set', 'elements': ['ANSSI-CC-2021/02']}, 'indirectly_referenced_by': {'_type': 'Set', 'elements': ['ANSSI-CC-2021/02', 'ANSSI-CC-2021/02-R01', 'ANSSI-CC-2021/02-R02']}, 'directly_referencing': {'_type': 'Set', 'elements': ['ANSSI-CC-2017/16']}, 'indirectly_referencing': {'_type': 'Set', 'elements': ['ANSSI-CC-2014/75', 'ANSSI-CC-2014/22', 'ANSSI-CC-2017/16']}} data.
    • The extracted_sars property was updated, with the {'_type': 'Set', 'elements': [{'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_CCL', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_DEL', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_FSP', 'level': 5}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_CMC', 'level': 4}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_CMS', 'level': 5}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_FUN', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_IND', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_TSS', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_TAT', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_ARC', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_SPD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_REQ', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_INT', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_IMP', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_TDS', 'level': 4}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_COV', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'AGD_OPE', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_ECD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_INT', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'AGD_PRE', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_LCD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_DPT', 'level': 3}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_OBJ', 'level': 2}]} values added.
  • 17.08.2024 The certificate data changed.
    Certificate changed

    The report_link was updated.

    • The new value is https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cc-2018-43fr.pdf.

    The st_link was updated.

    • The new value is https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cible-2018_43en.pdf.

    The state of the certificate object was updated.

    • The report property was updated, with the {'download_ok': False, 'convert_ok': False, 'extract_ok': False, 'pdf_hash': None, 'txt_hash': None} data.
    • The st property was updated, with the {'download_ok': False, 'convert_ok': False, 'extract_ok': False, 'pdf_hash': None, 'txt_hash': None} data.

    The PDF extraction data was updated.

    • The report_metadata property was set to None.
    • The st_metadata property was set to None.
    • The report_frontpage property was set to None.
    • The report_keywords property was set to None.
    • The st_keywords property was set to None.
    • The report_filename property was set to None.
    • The st_filename property was set to None.

    The computed heuristics were updated.

    • The cert_lab property was set to None.
    • The cert_id property was set to None.
    • The report_references property was updated, with the {'directly_referenced_by': None, 'indirectly_referenced_by': None, 'directly_referencing': None, 'indirectly_referencing': None} data.
    • The extracted_sars property was updated, with the {'_type': 'Set', 'elements': [{'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_CCL', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_DEL', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_FSP', 'level': 5}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_CMC', 'level': 4}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_CMS', 'level': 5}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_FUN', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_IND', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_ARC', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_TAT', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_TSS', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_SPD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_REQ', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_INT', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_IMP', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ADV_TDS', 'level': 4}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_COV', 'level': 2}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'AGD_OPE', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_ECD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_INT', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'AGD_PRE', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ALC_LCD', 'level': 1}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ATE_DPT', 'level': 3}, {'_type': 'sec_certs.sample.sar.SAR', 'family': 'ASE_OBJ', 'level': 2}]} values discarded.
  • 12.08.2024 The certificate data changed.
    Certificate changed

    The computed heuristics were updated.

    • The report_references property was updated, with the {'indirectly_referencing': {'__discard__': {'_type': 'Set', 'elements': ['ANSSI-CC-2014/75', 'ANSSI-CC-2014/22']}}} data.
    • The scheme_data property was set to {'product': 'Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library', 'url': 'https://cyber.gouv.fr/produits-certifies/samsung-s3fv9qms3fv9qk-32-bit-risc-microcontroller-smart-card-optional-secure', 'description': 'Le produit Ă©valuĂ© est « Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software, revision 3 » dĂ©veloppĂ© par SAMSUNG ELECTRONICS CO LTD..\n\nLe microcontrĂ´leur seul n’est pas un produit utilisable en tant que tel. Il est destinĂ© Ă  hĂ©berger une ou plusieurs applications. Il peut ĂŞtre insĂ©rĂ© dans un support p', 'sponsor': 'Samsung Electronics Co Ltd.', 'developer': 'Samsung Electronics Co Ltd.', 'cert_id': '2018/43', 'level': 'EAL5+', 'enhanced': {'cert_id': '2018/43', 'certification_date': '05/11/2018', 'category': 'Micro-circuits', 'cc_version': 'Critères Communs version 3.1r5', 'developer': 'Samsung Electronics Co Ltd.', 'sponsor': 'Samsung Electronics Co Ltd.', 'evaluation_facility': 'CEA-LETI', 'level': 'EAL5+', 'protection_profile': 'PP0035', 'mutual_recognition': 'SOG-IS\n CCRA', 'augmented': 'ALC_DVS.2, AVA_VAN.5', 'report_link': 'https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cc-2018-43fr.pdf', 'target_link': 'https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cible-2018_43en.pdf'}}.
  • 31.07.2024 The certificate data changed.
    Certificate changed

    The computed heuristics were updated.

    • The scheme_data property was set to None.
  • 23.07.2024 The certificate was first processed.
    New certificate

    A new Common Criteria certificate with the product name S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library was processed.

Raw data

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "Trusted Computing",
  "cert_link": null,
  "dgst": "49fdbc726cff0629",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2018/43",
    "cert_lab": [
      "CEA"
    ],
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VAN",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_INT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_PRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_OPE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMC",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_ARC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_TDS",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMS",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DEL",
          "level": 1
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "32"
      ]
    },
    "indirect_transitive_cves": null,
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2021/02"
        ]
      },
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2017/16"
        ]
      },
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2021/02",
          "ANSSI-CC-2021/02-R02",
          "ANSSI-CC-2021/02-R01"
        ]
      },
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2014/22",
          "ANSSI-CC-2017/16",
          "ANSSI-CC-2014/75"
        ]
      }
    },
    "scheme_data": {
      "cert_id": "ANSSI-CC-2018/43",
      "description": "Le produit \u00e9valu\u00e9 est \u00ab Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software, revision 3 \u00bb d\u00e9velopp\u00e9 par SAMSUNG ELECTRONICS CO LTD.. Le microcontr\u00f4leur seul n\u2019est pas un produit utilisable en tant que tel. Il est destin\u00e9 \u00e0 h\u00e9berger une ou plusieurs applications. Il peut \u00eatre ins\u00e9r\u00e9 dans un support p",
      "developer": "Samsung Electronics Co Ltd.",
      "enhanced": {
        "augmented": "ALC_DVS.2, AVA_VAN.5",
        "category": "Micro-circuits",
        "cc_version": "Crit\u00e8res Communs version 3.1r5",
        "cert_id": "ANSSI-CC-2018/43",
        "certification_date": "2018-11-05",
        "developer": "Samsung Electronics Co Ltd.",
        "evaluation_facility": "CEA-LETI",
        "level": "EAL5+",
        "mutual_recognition": "SOG-IS CCRA",
        "protection_profile": "PP0035",
        "report_link": "https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cc-2018-43fr.pdf",
        "sponsor": "Samsung Electronics Co Ltd.",
        "target_link": "https://cyber.gouv.fr/sites/default/files/2018/11/anssi-cible-2018_43en.pdf"
      },
      "level": "EAL5+",
      "product": "Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library",
      "sponsor": "Samsung Electronics Co Ltd.",
      "url": "https://cyber.gouv.fr/produits-certifies/samsung-s3fv9qms3fv9qk-32-bit-risc-microcontroller-smart-card-optional-secure"
    },
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": []
  },
  "manufacturer": "Samsung Electronics Co., Ltd.",
  "manufacturer_web": "https://www.samsung.com",
  "name": "S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library",
  "not_valid_after": "2023-11-05",
  "not_valid_before": "2018-11-05",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "anssi-cc-2018-43fr.pdf",
    "report_frontpage": {
      "FR": {
        "cc_security_level": "EAL 5 augment\u00e9 ALC_DVS.2, AVA_VAN.5",
        "cc_version": "Crit\u00e8res Communs version 3.1 r\u00e9vision 5",
        "cert_id": "ANSSI-CC-2018/43",
        "cert_item": "Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software",
        "cert_item_version": "revision 3",
        "cert_lab": "CEA - LETI 17 avenue des martyrs, 38054 Grenoble Cedex 9, France",
        "developer": "Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, Cor\u00e9e du Sud Commanditaire Samsung Electronics Co Ltd. 17 Floor, B-Tower, 1-1, Samsungjeonja-ro Hwaseong-si, Gyeonggi-do 445-330, Cor\u00e9e du Sud",
        "match_rules": [
          "R\u00e9f\u00e9rence du rapport de certification(.+)Nom du produit(.+)R\u00e9f\u00e9rence/version du produit(.+)Conformit\u00e9 \u00e0 un profil de protection(.+)Crit\u00e8res d\u2019\u00e9valuation et version(.+)Niveau d\u2019\u00e9valuation(.+)D\u00e9veloppeur (.+)Centre d\u2019\u00e9valuation(.+)Accords de reconnaissance applicables"
        ],
        "ref_protection_profiles": "Security IC Platform Protection Profile, version 1.0, certifi\u00e9 BSI-CC-PP-0035-2007 le 23 ao\u00fbt 2007"
      }
    },
    "report_keywords": {
      "asymmetric_crypto": {
        "ECC": {
          "ECC": {
            "ECC": 1
          }
        }
      },
      "cc_cert_id": {
        "FR": {
          "ANSSI-CC-2017/16": 1,
          "ANSSI-CC-2018/43": 19
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-CC-PP-0035-2007": 1,
          "BSI-PP-0035-2007": 1
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC": 1,
          "ADV_FSP": 1,
          "ADV_IMP": 1,
          "ADV_INT": 1,
          "ADV_SPM": 1,
          "ADV_TDS": 1
        },
        "AGD": {
          "AGD_OPE": 1,
          "AGD_PRE": 1
        },
        "ALC": {
          "ALC_CMC": 2,
          "ALC_CMS": 1,
          "ALC_DEL": 1,
          "ALC_DVS": 1,
          "ALC_DVS.2": 2,
          "ALC_FLR": 2,
          "ALC_TAT": 1
        },
        "ASE": {
          "ASE_CCL": 1,
          "ASE_ECD": 1,
          "ASE_INT": 1,
          "ASE_OBJ": 1,
          "ASE_REQ": 1,
          "ASE_SPD": 1,
          "ASE_TSS": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_DPT": 1,
          "ATE_FUN": 1,
          "ATE_IND": 1
        },
        "AVA": {
          "AVA_VAN": 2,
          "AVA_VAN.5": 3
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL 1": 1,
          "EAL 3": 1,
          "EAL 5": 3,
          "EAL 7": 1,
          "EAL2": 2,
          "EAL7": 1
        },
        "ITSEC": {
          "ITSEC E6 Elev\u00e9": 1
        }
      },
      "cc_sfr": {},
      "certification_process": {},
      "cipher_mode": {},
      "cplc_data": {},
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {},
      "crypto_scheme": {},
      "device_model": {},
      "ecc_curve": {},
      "eval_facility": {
        "CEA-LETI": {
          "CEA - LETI": 1,
          "CEA-LETI": 1
        },
        "CESTI": {
          "CESTI": 3
        }
      },
      "hash_function": {},
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {},
      "pq_crypto": {},
      "randomness": {
        "TRNG": {
          "DTRNG": 6
        }
      },
      "side_channel_analysis": {},
      "standard_id": {
        "BSI": {
          "AIS 31": 2
        },
        "CC": {
          "CCMB-2017-04-001": 1,
          "CCMB-2017-04-002": 1,
          "CCMB-2017-04-003": 1,
          "CCMB-2017-04-004": 1
        }
      },
      "symmetric_crypto": {
        "AES_competition": {
          "AES": {
            "AES": 1
          }
        },
        "DES": {
          "3DES": {
            "Triple-DES": 1
          },
          "DES": {
            "DES": 1
          }
        }
      },
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {
        "Samsung": {
          "Samsung": 19
        }
      },
      "vulnerability": {}
    },
    "report_metadata": {
      "/Category": "revision 3",
      "/Comments": "Samsung Electronics Co Ltd.",
      "/Company": "SGDSN/ANSSI",
      "/CreationDate": "D:20181120145904+01\u002700\u0027",
      "/Creator": "Acrobat PDFMaker 11 pour Word",
      "/Keywords": "ANSSI-CC-CER-F-07.026",
      "/ModDate": "D:20181127163721+01\u002700\u0027",
      "/Producer": "Adobe PDF Library 11.0",
      "/SourceModified": "D:20181120135900",
      "/Subject": "Samsung S3FV9QM/S3FV9QK 32-bit RISC Microcontroller for Smart Card with optional Secure RSA/ECC/SHA Library including specific IC Dedicated Software",
      "/Title": "ANSSI-CC-2018/43",
      "pdf_file_size_bytes": 336598,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": [
          "mailto:[email protected]",
          "http://www.ssi.gouv.fr/"
        ]
      },
      "pdf_is_encrypted": false,
      "pdf_number_of_pages": 18
    },
    "st_filename": "anssi-cible-2018_43en.pdf",
    "st_frontpage": null,
    "st_keywords": {
      "asymmetric_crypto": {
        "ECC": {
          "ECC": {
            "ECC": 23
          },
          "ECDH": {
            "ECDH": 6
          },
          "ECDSA": {
            "ECDSA": 12
          }
        },
        "FF": {
          "DH": {
            "Diffie-Hellman": 2
          },
          "DSA": {
            "DSA": 2
          }
        },
        "RSA": {
          "RSA-CRT": 1
        }
      },
      "cc_cert_id": {},
      "cc_claims": {
        "O": {
          "O.MEM_ACCESS": 1,
          "O.RND": 5,
          "O.RNG": 1
        },
        "T": {
          "T.RND": 5
        }
      },
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-PP-0035": 5
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC.1": 7,
          "ADV_ARV": 1,
          "ADV_FSP": 2,
          "ADV_FSP.4": 2,
          "ADV_FSP.5": 3,
          "ADV_IMP": 1,
          "ADV_IMP.1": 2,
          "ADV_INT.2": 1,
          "ADV_TDS.3": 1,
          "ADV_TDS.4": 1,
          "ADV_VAN": 1
        },
        "AGD": {
          "AGD_OPE": 1,
          "AGD_OPE.1": 2,
          "AGD_PRE": 1,
          "AGD_PRE.1": 2
        },
        "ALC": {
          "ALC_CMC": 1,
          "ALC_CMC.4": 1,
          "ALC_CMS": 2,
          "ALC_CMS.4": 1,
          "ALC_CMS.5": 3,
          "ALC_DEL": 1,
          "ALC_DEL.1": 1,
          "ALC_DVS": 1,
          "ALC_DVS.1": 1,
          "ALC_DVS.2": 7,
          "ALC_LCD.1": 1,
          "ALC_TAT.2": 1
        },
        "ASE": {
          "ASE_CCL.1": 1,
          "ASE_ECD.1": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ.2": 1,
          "ASE_REQ.2": 1,
          "ASE_SPD.1": 1,
          "ASE_TSS.1": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_COV.2": 1,
          "ATE_DPT.1": 1,
          "ATE_DPT.3": 1,
          "ATE_FUN.1": 1,
          "ATE_IND.2": 1
        },
        "AVA": {
          "AVA_VAN.5": 13
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL 4": 1,
          "EAL 4 augmented": 1,
          "EAL 5": 2,
          "EAL 5 augmented": 2,
          "EAL5": 6,
          "EAL5 augmented": 1
        }
      },
      "cc_sfr": {
        "FAU": {
          "FAU_GEN": 2,
          "FAU_GEN.1": 1,
          "FAU_SAS": 8,
          "FAU_SAS.1": 12,
          "FAU_SAS.1.1": 2
        },
        "FCS": {
          "FCS_CKM": 9,
          "FCS_CKM.1": 30,
          "FCS_CKM.2": 4,
          "FCS_CKM.4": 14,
          "FCS_COP": 33,
          "FCS_COP.1": 27,
          "FCS_RNG": 6,
          "FCS_RNG.1": 14,
          "FCS_RNG.1.1": 2,
          "FCS_RNG.1.2": 2
        },
        "FDP": {
          "FDP_ACC": 1,
          "FDP_ACC.1": 14,
          "FDP_ACC.1.1": 1,
          "FDP_ACF": 2,
          "FDP_ACF.1": 10,
          "FDP_ACF.1.1": 1,
          "FDP_ACF.1.2": 1,
          "FDP_ACF.1.3": 1,
          "FDP_ACF.1.4": 1,
          "FDP_IFC": 1,
          "FDP_IFC.1": 18,
          "FDP_IFC.1.1": 1,
          "FDP_IFF.1": 3,
          "FDP_ITC.1": 11,
          "FDP_ITC.2": 11,
          "FDP_ITT": 1,
          "FDP_ITT.1": 17,
          "FDP_ITT.1.1": 1,
          "FDP_SDI.1": 1
        },
        "FMT": {
          "FMT_CKM.4": 1,
          "FMT_LIM": 8,
          "FMT_LIM.1": 24,
          "FMT_LIM.1.1": 2,
          "FMT_LIM.2": 28,
          "FMT_LIM.2.1": 2,
          "FMT_MSA": 2,
          "FMT_MSA.1": 12,
          "FMT_MSA.1.1": 1,
          "FMT_MSA.3": 13,
          "FMT_MSA.3.1": 1,
          "FMT_MSA.3.2": 1,
          "FMT_SMF": 1,
          "FMT_SMF.1": 9,
          "FMT_SMF.1.1": 1,
          "FMT_SMR.1": 6
        },
        "FPT": {
          "FPT_FLS": 1,
          "FPT_FLS.1": 22,
          "FPT_FLS.1.1": 1,
          "FPT_ITT": 1,
          "FPT_ITT.1": 15,
          "FPT_ITT.1.1": 1,
          "FPT_PHP": 3,
          "FPT_PHP.3": 20,
          "FPT_PHP.3.1": 1
        },
        "FRU": {
          "FRU_FLT": 1,
          "FRU_FLT.1": 1,
          "FRU_FLT.2": 17
        }
      },
      "certification_process": {},
      "cipher_mode": {
        "ECB": {
          "ECB": 3
        }
      },
      "cplc_data": {
        "ICVersion": {
          "IC Version": 1
        }
      },
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {
        "PGP": {
          "PGP": 2
        }
      },
      "crypto_scheme": {
        "KA": {
          "Key Agreement": 2
        }
      },
      "device_model": {},
      "ecc_curve": {
        "Brainpool": {
          "brainpoolP192r1": 4,
          "brainpoolP192t1": 4,
          "brainpoolP224r1": 4,
          "brainpoolP224t1": 4,
          "brainpoolP256r1": 4,
          "brainpoolP256t1": 4,
          "brainpoolP320r1": 4,
          "brainpoolP320t1": 4,
          "brainpoolP384r1": 4,
          "brainpoolP384t1": 4,
          "brainpoolP512r1": 4,
          "brainpoolP512t1": 4
        },
        "NIST": {
          "P-192": 8,
          "P-224": 8,
          "P-256": 8,
          "P-384": 8,
          "P-521": 4,
          "secp192k1": 4,
          "secp192r1": 4,
          "secp224k1": 4,
          "secp224r1": 4,
          "secp256k1": 4,
          "secp256r1": 4,
          "secp384r1": 4,
          "secp521r1": 4
        }
      },
      "eval_facility": {},
      "hash_function": {
        "SHA": {
          "SHA1": {
            "SHA1": 2
          },
          "SHA2": {
            "SHA224": 6,
            "SHA256": 6,
            "SHA384": 6,
            "SHA512": 5
          }
        }
      },
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {},
      "pq_crypto": {},
      "randomness": {
        "RNG": {
          "RND": 10,
          "RNG": 3
        },
        "TRNG": {
          "DTRNG": 20,
          "TRNG": 4
        }
      },
      "side_channel_analysis": {
        "FI": {
          "DFA": 4,
          "Malfunction": 27,
          "malfunction": 11,
          "physical tampering": 2
        },
        "SCA": {
          "DPA": 8,
          "Leak-Inherent": 23,
          "Physical Probing": 4,
          "Physical probing": 2,
          "SPA": 7,
          "physical probing": 9,
          "side channel": 1,
          "side-channel": 4,
          "timing attack": 2,
          "timing attacks": 1
        },
        "other": {
          "reverse engineering": 5
        }
      },
      "standard_id": {
        "BSI": {
          "AIS 31": 1,
          "AIS31": 4,
          "BSI-AIS31": 3
        },
        "CC": {
          "CCMB-2017-04-001": 3,
          "CCMB-2017-04-002": 2,
          "CCMB-2017-04-003": 2,
          "CCMB-2017-04-004": 3
        },
        "FIPS": {
          "FIPS 197": 1,
          "FIPS PUB 180-3": 6
        }
      },
      "symmetric_crypto": {
        "AES_competition": {
          "AES": {
            "AES": 13
          }
        },
        "DES": {
          "3DES": {
            "3DES": 6,
            "TDEA": 1,
            "TDES": 1,
            "Triple-DES": 1
          },
          "DES": {
            "DES": 8
          }
        },
        "constructions": {
          "MAC": {
            "HMAC": 2
          }
        }
      },
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {
        "Samsung": {
          "Samsung": 3
        }
      },
      "vulnerability": {}
    },
    "st_metadata": {
      "/CreationDate": "D:20180606113443+09\u002700\u0027",
      "/Creator": "Microsoft\u00ae Word 2010",
      "/ModDate": "D:20181127163657+01\u002700\u0027",
      "/Producer": "Microsoft\u00ae Word 2010",
      "/Title": "Security Target",
      "pdf_file_size_bytes": 834408,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": [
          "http://www.ecc-brainpool.org/"
        ]
      },
      "pdf_is_encrypted": false,
      "pdf_number_of_pages": 72
    }
  },
  "protection_profiles": {
    "_type": "Set",
    "elements": [
      {
        "_type": "sec_certs.sample.protection_profile.ProtectionProfile",
        "pp_eal": "EAL4+",
        "pp_ids": {
          "_type": "Set",
          "elements": [
            "PKISKPP",
            "SECURITY_IC_V1.0"
          ]
        },
        "pp_link": "https://www.commoncriteriaportal.org/files/ppfiles/pp0035b.pdf",
        "pp_name": "Security IC Platform Protection Profile, Version 1.0"
      }
    ]
  },
  "report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cc-2018-43fr.pdf",
  "scheme": "FR",
  "security_level": {
    "_type": "Set",
    "elements": [
      "EAL5+",
      "ALC_DVS.2",
      "AVA_VAN.5"
    ]
  },
  "st_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cible-2018_43en.pdf",
  "state": {
    "_type": "sec_certs.sample.cc.CCCertificate.InternalState",
    "cert": {
      "_type": "sec_certs.sample.cc.CCCertificate.DocumentState",
      "convert_garbage": false,
      "convert_ok": false,
      "download_ok": false,
      "extract_ok": false,
      "pdf_hash": null,
      "txt_hash": null
    },
    "report": {
      "_type": "sec_certs.sample.cc.CCCertificate.DocumentState",
      "convert_garbage": false,
      "convert_ok": true,
      "download_ok": true,
      "extract_ok": true,
      "pdf_hash": "96d7b8c13466763d53fde6f14a492826bb5742617ec3cf617ff0c40e8bb4d808",
      "txt_hash": "9d9f9d55566313b38fcb696193fdb8c2b8bc22f0439366cdf3234d59394ae06b"
    },
    "st": {
      "_type": "sec_certs.sample.cc.CCCertificate.DocumentState",
      "convert_garbage": false,
      "convert_ok": true,
      "download_ok": true,
      "extract_ok": true,
      "pdf_hash": "a24ceefba9de94750b0af50780db7051031e5a89165e7597eb02b64a12bfda46",
      "txt_hash": "921ac62127478cf4d031b6c72791638d5d8d06fa6e857b389e025a065de5379d"
    }
  },
  "status": "archived"
}