SAMSUNG Microcontroller RISC 32-bits S3FS91J / S3FS91H / S3FS91V / S3FS93I with SWP, Rev. 7

CSV information

Status archived
Valid from 18.03.2010
Valid until 01.09.2019
Scheme 🇫🇷 FR
Manufacturer Samsung Electronics Co., Ltd.
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level ALC_DVS.2, EAL5+, AVA_VAN.5
Protection profiles

Heuristics summary

Certificate ID: ANSSI-CC-2009/57

Certificate

certificate could not be downloaded, no link is available.

Certification report

Certification report PDF TXT

Extracted keywords

Symmetric Algorithms
DES
Randomness
TRNG

Vendor
Samsung

Security level
EAL 5, EAL4, EAL5, EAL4+, EAL7, EAL 1, EAL 3, EAL 7, EAL5+, ITSEC E6 et
Security Assurance Requirements (SAR)
ACM_AUT, ACM_CAP, ADO_DEL, ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_OPE, AGD_PRE, ALC_DVS.2, ALC_DVS, ALC_FLR, ALC_CMC, ALC_CMS, ALC_DEL, ALC_TAT, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VAN.5, AVA_VAN, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_REQ, ASE_SPD, ASE_TSS
Protection profiles
BSI-PP-0035, BSI-PP-0035-2007
Certificates
ANSSI-CC-2009/57, ANSSI-CC-2009/25
Evaluation facilities
CESTI, CEA - LETI

Standards
AIS 34, AIS34, CCIMB-2009-07-001, CCIMB-2009-07-002, CCIMB-2009-07-003, CCIMB-2009-07-004

File metadata

Creation date D:20100611150832+02'00'
Modification date D:20100611150832+02'00'
Pages 17
Producer GPL Ghostscript 8.15

Frontpage

Certificate ID ANSSI-CC-2009/25
Certified item Microcontrôleurs RISC 32-bits SAMSUNG S3FS91J / S3FS91H / S3FS91V / S3FS93I, avec SWP, Rév. 7
Certification lab CEA - LETI 17 rue des martyrs, 38054 Grenoble Cedex 9, France Tél : +33 (0)4 38 78 40 87, mél : [email protected]
Developer Samsung Electronics Co. Ltd San#24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do, 449-711, République de Corée Commanditaire Samsung Electronics Co. Ltd San#24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do, 449-711, République de Corée

References

Outgoing
  • ANSSI-CC-2009/25 - archived - SAMSUNG S3FS91J / S3FS91H / S3FS91V / S3FS93I Secure Microcontroller RISC 32-bits, with SWP, Rev. 5
Incoming

Security target

Security target PDF TXT

Extracted keywords

Symmetric Algorithms
DES, TDES, 3DES, Triple-DES, TDEA
Randomness
TRNG, RND
Block cipher modes
ECB

Vendor
Samsung

Security level
EAL5, EAL 4, EAL 5, EAL5 augmented, EAL 4 augmented, EAL 5 augmented
Claims
O.RND, T.RND
Security Assurance Requirements (SAR)
ADV_ARC, ADV_FSP, ADV_IMP, ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, ADV_FSP.2, ADV_TDS.3, ADV_FSP.4, AGD_OPE, AGD_PRE, AGD_OPE.1, AGD_PRE.1, ALC_DVS.2, ALC_DEL, ALC_DVS, ALC_CMS, ALC_CMC, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_LCD.1, ALC_TAT.2, ALC_DVS.1, ALC_CMS.4, ATE_COV, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, AVA_VAN.5, AVA_VAN, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_SAS, FAU_GEN, FAU_SAS.1, FAU_SAS.1.1, FAU_GEN.1, FCS_RNG, FCS_RNG.1, FCS_RNG.1.1, FCS_RNG.1.2, FCS_COP.1, FCS_COP, FCS_CKM.1, FCS_CKM.4, FCS_CKM, FCS_CKM.2, FDP_ACF, FDP_ITT.1, FDP_ITT.1.1, FDP_ACC.1, FDP_IFC.1, FDP_IFC.1.1, FDP_IFF.1, FDP_ACF.1, FDP_ACC.1.1, FDP_ACF.1.1, FDP_ACF.1.2, FDP_ACF.1.3, FDP_ACF.1.4, FDP_ITC.1, FDP_ITC.2, FDP_SDI.1, FDP_ACC, FDP_IFC, FDP_ITT, FMT_LIM, FMT_LIM.1, FMT_LIM.2, FMT_LIM.1.1, FMT_LIM.2.1, FMT_MSA.3, FMT_MSA.1, FMT_MSA.3.1, FMT_MSA.3.2, FMT_SMR.1, FMT_MSA.1.1, FMT_SMF.1, FMT_SMF.1.1, FMT_MSA, FMT_SMF, FPT_FLS.1, FPT_FLS.1.1, FPT_PHP.3, FPT_PHP.3.1, FPT_PHP, FPT_ITT.1, FPT_ITT.1.1, FPT_FLS, FPT_ITT, FRU_FLT.2, FRU_FLT.1, FRU_FLT
Protection profiles
BSI-PP-0035

Side-channel analysis
Leak-Inherent, Physical Probing, physical probing, Physical probing, side-channel, SPA, DPA, timing attacks, physical tampering, Malfunction, malfunction, DFA, reverse engineering

Standards
AIS31

File metadata

Title Security Target Lite of S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP
Subject S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP Common Criteria(version 3.1) EAL5+ Evaluation
Keywords Security Target Lite of S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP, CC EAL5+, Samsung Electroncis, SmartCard IC, Common Criteria version 3.1
Author KyungSuk YI
Creation date D:20100121195454+09'00'
Modification date D:20100121200033+09'00'
Pages 62
Creator Wordìš© Acrobat PDFMaker 9.1
Producer Acrobat Distiller 9.2.0 (Windows)

References

Incoming

Heuristics

Automated inference - use with caution

All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. For details on our data sources and inference methods, see our methodology. If you believe any information here is inaccurate or harmful, please submit feedback.

Certificate ID

ANSSI-CC-2009/57

Extracted SARs

ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, AGD_OPE.1, AGD_PRE.1, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_DVS.2, ALC_LCD.1, ALC_TAT.2, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, AVA_VAN.5

Similar certificates

Name Certificate ID
SAMSUNG S3FS91J / S3FS91H / S3FS91V / S3FS93I Secure Microcontroller RISC 32-bits, with SWP, Rev. 5 ANSSI-CC-2009/25 Compare
Microcontrôleurs RISC 32-bits SAMSUNG S3FS91J /S3FS91H / S3FS91V / S3FS93I, avec SWP, Rév. 7, incluant la librairie s... ANSSI-CC-2013/49 Compare
S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller for Smartcard with SWP None Compare

References

Updates

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  • The certificate data changed.
  • The certificate was first processed.

Raw data 

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": null,
  "dgst": "7387ae4d4fabe818",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2009/57",
    "cert_lab": [
      "CEA"
    ],
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL5+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DEL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMS",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMC",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_TDS",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_ARC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VAN",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_OPE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_PRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_INT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 2
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "32",
        "7"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": {
      "_type": "Set",
      "elements": [
        "f6d23054061d72ba"
      ]
    },
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2011/24",
          "NSCIB-CC-11-32973-CR",
          "ANSSI-CC-2013/49",
          "NSCIB-CC-09-26151-CR"
        ]
      },
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2009/25"
        ]
      },
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2016/60",
          "ANSSI-CC-2013/65",
          "NSCIB-CC-11-32973-CR",
          "ANSSI-CC-2019/38",
          "ANSSI-CC-2013/49",
          "NSCIB-CC-09-26151-CR",
          "ANSSI-CC-2014/81",
          "ANSSI-CC-2013/60",
          "ANSSI-CC-2012/39",
          "ANSSI-CC-2012/06",
          "ANSSI-CC-2011/24"
        ]
      },
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2009/25"
        ]
      }
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2011/24",
          "NSCIB-CC-11-32973-CR",
          "NSCIB-CC-09-26151-CR"
        ]
      },
      "directly_referencing": null,
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2011/24",
          "NSCIB-CC-11-32973-CR",
          "NSCIB-CC-09-26151-CR"
        ]
      },
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": []
  },
  "manufacturer": "Samsung Electronics Co., Ltd.",
  "manufacturer_web": "https://www.samsung.com",
  "name": "SAMSUNG Microcontroller RISC 32-bits S3FS91J / S3FS91H / S3FS91V / S3FS93I with SWP, Rev. 7",
  "not_valid_after": "2019-09-01",
  "not_valid_before": "2010-03-18",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "ANSSI-CC_2009-57fr.pdf",
    "report_frontpage": {
      "FR": {
        "cc_security_level": "EAL 5 augment\u00e9 ALC_DVS.2, AVA_VAN.5",
        "cc_version": "Crit\u00e8res Communs version 3.1 (R3",
        "cert_id": "ANSSI-CC-2009/25",
        "cert_item": "Microcontr\u00f4leurs RISC 32-bits SAMSUNG S3FS91J / S3FS91H / S3FS91V / S3FS93I, avec SWP, R\u00e9v. 7",
        "cert_item_version": "Microcontr\u00f4leur : S3FS91J/ S3FS91H/ S3FS91V/ S3FS93I - R\u00e9v. 7 Librairies logicielles : Test Rom code version 1.0, RSA library version 3.9S, TRNG library version 1.0, Secure Bootloader version 1.0",
        "cert_lab": "CEA - LETI 17 rue des martyrs, 38054 Grenoble Cedex 9, France T\u00e9l : +33 (0)4 38 78 40 87, m\u00e9l : [email protected]",
        "developer": "Samsung Electronics Co. Ltd San#24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do, 449-711, R\u00e9publique de Cor\u00e9e Commanditaire Samsung Electronics Co. Ltd San#24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do, 449-711, R\u00e9publique de Cor\u00e9e",
        "match_rules": [
          "R\u00e9f\u00e9rence du rapport de certification(.+)Nom du produit(.+)R\u00e9f\u00e9rence/version du produit(.+)Conformit\u00e9 \u00e0 un profil de protection(.+)Crit\u00e8res d\u2019\u00e9valuation et version(.+)Niveau d\u2019\u00e9valuation(.+)D\u00e9veloppeur (.+)Centre d\u2019\u00e9valuation(.+)Accords de reconnaissance applicables"
        ],
        "ref_protection_profiles": "BSI-PP-0035 Security IC Platform Protection Profile Version 1.0 June 2007"
      }
    },
    "report_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {
        "FR": {
          "ANSSI-CC-2009/25": 2,
          "ANSSI-CC-2009/57": 17
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-PP-0035": 1,
          "BSI-PP-0035-2007": 1
        }
      },
      "cc_sar": {
        "ACM": {
          "ACM_AUT": 1,
          "ACM_CAP": 1
        },
        "ADO": {
          "ADO_DEL": 2
        },
        "ADV": {
          "ADV_ARC": 1,
          "ADV_FSP": 1,
          "ADV_IMP": 1,
          "ADV_INT": 1,
          "ADV_SPM": 1,
          "ADV_TDS": 1
        },
        "AGD": {
          "AGD_OPE": 1,
          "AGD_PRE": 1
        },
        "ALC": {
          "ALC_CMC": 1,
          "ALC_CMS": 1,
          "ALC_DEL": 1,
          "ALC_DVS": 3,
          "ALC_DVS.2": 1,
          "ALC_FLR": 2,
          "ALC_TAT": 1
        },
        "ASE": {
          "ASE_CCL": 1,
          "ASE_ECD": 1,
          "ASE_INT": 1,
          "ASE_OBJ": 1,
          "ASE_REQ": 1,
          "ASE_SPD": 1,
          "ASE_TSS": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_DPT": 1,
          "ATE_FUN": 1,
          "ATE_IND": 1
        },
        "AVA": {
          "AVA_VAN": 1,
          "AVA_VAN.5": 1
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL 1": 1,
          "EAL 3": 1,
          "EAL 5": 3,
          "EAL 7": 1,
          "EAL4": 2,
          "EAL4+": 2,
          "EAL5": 1,
          "EAL5+": 1,
          "EAL7": 1
        },
        "ITSEC": {
          "ITSEC E6 et": 1
        }
      },
      "cc_sfr": {},
      "certification_process": {},
      "cipher_mode": {},
      "cplc_data": {},
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {},
      "crypto_scheme": {},
      "device_model": {},
      "ecc_curve": {},
      "eval_facility": {
        "CEA-LETI": {
          "CEA - LETI": 1
        },
        "CESTI": {
          "CESTI": 4
        }
      },
      "hash_function": {},
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {},
      "pq_crypto": {},
      "randomness": {
        "TRNG": {
          "TRNG": 7
        }
      },
      "side_channel_analysis": {},
      "standard_id": {
        "BSI": {
          "AIS 34": 2,
          "AIS34": 1
        },
        "CC": {
          "CCIMB-2009-07-001": 1,
          "CCIMB-2009-07-002": 1,
          "CCIMB-2009-07-003": 1,
          "CCIMB-2009-07-004": 1
        }
      },
      "symmetric_crypto": {
        "DES": {
          "DES": {
            "DES": 1
          }
        }
      },
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {
        "Samsung": {
          "Samsung": 18
        }
      },
      "vulnerability": {}
    },
    "report_metadata": {
      "/CreationDate": "D:20100611150832+02\u002700\u0027",
      "/Keywords": "",
      "/ModDate": "D:20100611150832+02\u002700\u0027",
      "/Producer": "GPL Ghostscript 8.15",
      "pdf_file_size_bytes": 317215,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": []
      },
      "pdf_is_encrypted": false,
      "pdf_number_of_pages": 17
    },
    "st_filename": "ANSSI-CC-cible_2009-57en.pdf",
    "st_frontpage": null,
    "st_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {},
      "cc_claims": {
        "O": {
          "O.RND": 5
        },
        "T": {
          "T.RND": 5
        }
      },
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-PP-0035": 5
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC": 1,
          "ADV_ARC.1": 3,
          "ADV_FSP": 2,
          "ADV_FSP.2": 1,
          "ADV_FSP.4": 1,
          "ADV_FSP.5": 3,
          "ADV_IMP": 1,
          "ADV_IMP.1": 2,
          "ADV_INT.2": 1,
          "ADV_TDS.3": 1,
          "ADV_TDS.4": 1
        },
        "AGD": {
          "AGD_OPE": 1,
          "AGD_OPE.1": 2,
          "AGD_PRE": 1,
          "AGD_PRE.1": 2
        },
        "ALC": {
          "ALC_CMC": 1,
          "ALC_CMC.4": 1,
          "ALC_CMS": 2,
          "ALC_CMS.4": 1,
          "ALC_CMS.5": 3,
          "ALC_DEL": 1,
          "ALC_DEL.1": 1,
          "ALC_DVS": 1,
          "ALC_DVS.1": 1,
          "ALC_DVS.2": 9,
          "ALC_LCD.1": 1,
          "ALC_TAT.2": 1
        },
        "ASE": {
          "ASE_CCL.1": 1,
          "ASE_ECD.1": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ.2": 1,
          "ASE_REQ.2": 1,
          "ASE_SPD.1": 1,
          "ASE_TSS.1": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_COV.2": 1,
          "ATE_DPT.3": 1,
          "ATE_FUN.1": 1,
          "ATE_IND.2": 1
        },
        "AVA": {
          "AVA_VAN": 2,
          "AVA_VAN.5": 11
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL 4": 1,
          "EAL 4 augmented": 1,
          "EAL 5": 2,
          "EAL 5 augmented": 2,
          "EAL5": 6,
          "EAL5 augmented": 1
        }
      },
      "cc_sfr": {
        "FAU": {
          "FAU_GEN": 2,
          "FAU_GEN.1": 1,
          "FAU_SAS": 8,
          "FAU_SAS.1": 12,
          "FAU_SAS.1.1": 2
        },
        "FCS": {
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      "/Baustein": "SLE66C82P/SLE66C42P",
      "/BausteinVersion": "a15",
      "/Classification": "Public",
      "/Comments": "",
      "/Company": "",
      "/CreationDate": "D:20100121195454+09\u002700\u0027",
      "/Creator": " Word\uc6a9 Acrobat PDFMaker 9.1",
      "/Datum": "23-10-2003",
      "/Dokument": "Security Target",
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      "/Jahr": "2003",
      "/Keywords": "Security Target Lite of S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP, CC EAL5+, Samsung Electroncis, SmartCard IC, Common Criteria version 3.1 ",
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      "/PP_Short": "BSI-PP-0002; Version 1.0, July 2001",
      "/PP_Version": "1.0",
      "/Producer": "Acrobat Distiller 9.2.0 (Windows)",
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      "/ROM": "64 kBytes",
      "/SourceModified": "D:20100121105235",
      "/Subject": "\r\nS3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP Common Criteria(version 3.1) EAL5+ Evaluation",
      "/Technologie": "0,22 \u00b5m",
      "/Title": "Security Target Lite of S3FS91J/S3FS91H/S3FS91V/S3FS93I 32-bits RISC Microcontroller For Smart Card with SWP",
      "/Version": "1.2",
      "/XRAM": "2 kBytes",
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