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NXP Smart Card Controller P60D080PVC and its major configurations P60D052PVC, P60D040PVC, P60C080PVC, P60C052PVC and P60C040PVC
Certificate details
| Status | archived |
|---|---|
| Valid from | 24.06.2013 |
| Valid until | 01.09.2019 |
| Scheme | 🇩🇪 DE |
| Manufacturer | NXP Semiconductors Germany GmbH Business Line Identification |
| Category | ICs, Smart Cards and Smart Card-Related Devices and Systems |
| Security level | ALC_FLR.1, EAL6+ |
| Protection profiles | |
| Maintenance updates | NXP Smart Card Controller P60D080/052/040PVC(y) and P60C080/052/040PVC(y) with IC dedicated Software (04.02.2014) Certification report Security target |
Certificate
certificate could not be downloaded, no link is available.
Certification report
Extracted keywords
Symmetric Algorithms
AES, DES, Triple-DESRandomness
RNGEngines
SmartMX2Vendor
NXP, NXP SemiconductorsSecurity level
EAL 6, EAL 4, EAL 5, EAL1, EAL4, EAL5, EAL5+, EAL6, EAL3, EAL7, EAL2, EAL 6 augmented, ITSEC EvaluationClaims
O.C, R.OSecurity Assurance Requirements (SAR)
ADV_FSP.5, ADV_IMP.2, ADV_INT.3, ADV_SPM.1, ADV_TDS.5, ADV_ARC.1, ADV_FSP.1, ADV_FSP.2, ADV_FSP.3, ADV_FSP.4, ADV_FSP.6, ADV_IMP.1, ADV_INT.1, ADV_INT.2, ADV_TDS.1, ADV_TDS.2, ADV_TDS.3, ADV_TDS.4, ADV_TDS.6, ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_OPE.1, AGD_PRE.1, AGD_OPE, AGD_PRE, ALC_FLR.1, ALC_CMC.5, ALC_CMS.5, ALC_DVS.2, ALC_TAT.3, ALC_CMC.1, ALC_CMC.2, ALC_CMC.3, ALC_CMC.4, ALC_CMS.1, ALC_CMS.2, ALC_CMS.3, ALC_CMS.4, ALC_DEL.1, ALC_DVS.1, ALC_FLR.2, ALC_FLR.3, ALC_LCD.1, ALC_LCD.2, ALC_TAT.1, ALC_TAT.2, ALC_CMC, ALC_CMS, ALC_DEL, ALC_DVS, ALC_FLR, ALC_LCD, ALC_TAT, ATE_COV.3, ATE_DPT.3, ATE_FUN.2, ATE_FUN, ATE_COV.2, ATE_COV.1, ATE_DPT.1, ATE_DPT.2, ATE_DPT.4, ATE_FUN.1, ATE_IND.1, ATE_IND.2, ATE_IND.3, ATE_COV, ATE_DPT, ATE_IND, AVA_VAN.5, AVA_VAN.1, AVA_VAN.2, AVA_VAN.3, AVA_VAN.4, AVA_VAN, APE_INT.1, APE_CCL.1, APE_SPD.1, APE_OBJ.1, APE_OBJ.2, APE_ECD.1, APE_REQ.1, APE_REQ.2, ASE_TSS.2, ASE_INT.1, ASE_CCL.1, ASE_SPD.1, ASE_OBJ.1, ASE_OBJ.2, ASE_ECD.1, ASE_REQ.1, ASE_REQ.2, ASE_TSS.1, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_SPD, ASE_TSSProtection profiles
BSI-CC-PP-0035-2007Certificates
BSI-DSZ-CC-0837-2013, BSI-DSZ-CC-0837Evaluation facilities
TÜV InformationstechnikSide-channel analysis
physical probing, JILCertification process
Version 1.0, 2012-12-13, NXP Secure Smart Card Controller P60x080/052/040PVC, NXP Semiconductors (confidential document, Evaluation Technical Report, BSI-DSZ-CC-0837, Version 4, 2013-03-27, TÜV Informationstechnik GmbH (confidential document, Smart Card Controller P60x080/052/040PVC, Version 5, 2013-04-23, [9] TÜV Informationstechnik GmbH (confidential document, Configuration List, NXP Semiconductors, Business Unit Identification, Rev 01.00, 2012-12-11 (confidential document, family P60x040/052/080 VC, NXP Semiconductors, Business Unit Identification, Rev. 3.0, 2012-10-31 (confidential document, smart card controller, NXP Semiconductors, Business Unit Identification, Rev. 3.1, 2012-02-02 (confidential document, NXP Secure Smart Card Controller P60x040/052/080VC, NXP Semiconductors, Rev. 1.0, 2012-11-22 (confidential document, specification, SmartMX2 family P60x040/052/080 VC, NXP Semiconductors, Rev. 3.0, 2012-10-18 (confidential document, Addendum, SmartMX2 family, Post Delivery Configuration, NXP Semiconductors, Rev. 3.1, 2012-12-12 (confidential document, Data Sheet Addendum, SmartMX2 family, Chip Health Mode, NXP Semiconductors, Rev. 3.0, 2012-05-11 (confidential document, family, Firmware Interface Specification, Firmware, NXP Semiconductors, Rev. 3.3, 2012-12-11 (confidential documentFrontpage
| Certificate ID | BSI-DSZ-CC-0837-2013 #### |
|---|---|
| Certified item | ### NXP Smart Card Controller P60D080PVC and its major configurations P60D052PVC, P60D040PVC, P60C080PVC, P60C052PVC and P60C040PVC #### |
| Certification lab | BSI |
| Developer | ### NXP Semiconductors Germany GmbH BSI - |
Cross-references
Incoming- NSCIB-CC-12-36243-CR - archived - Crypto Library V1.0 on P60x080/052/040PVC
- BSI-DSZ-CC-0892-2014 - archived - MTCOS Pro 2.2 EAC with PACE / P60D080PVC
- ANSSI-CC-2014/86 - archived - Plateforme Java Card en configuration ouverte de la carte à puce MultiApp v3.1 masquée sur le composant P60D080PVC(Version du patch : 1.4)
- BSI-DSZ-CC-0893-2014 - archived - MTCOS Pro 2.2 EAC with PACE / P60D080PVC (BAC)
- BSI-DSZ-CC-0861-2014 - archived - MICARDO V4.0 R1.0 eHC v1.2
Security target
Extracted keywords
Symmetric Algorithms
AES, DES, DEA, Triple-DES, TripleDES, TDEA, Triple-DEA, TDESAsymmetric Algorithms
ECCRandomness
TRNG, RND, RNGEngines
SmartMX2, SmartMXVendor
NXP, NXP Semiconductors, PhilipsSecurity level
EAL6, EAL4, EAL6+, EAL4+, EAL 6, EAL6 augmented, EAL4 augmentedClaims
O.RND, O.INTEGRITY_CHK, O.HW_AES, O.CUST_RECONFIG, O.EEPROM_INTEGRITY, O.FM_FW, O.MEM_ACCESS, O.SFR_ACCESS, T.RNDSecurity Assurance Requirements (SAR)
ADV_ARC.1, ADV_FSP.5, ADV_IMP.2, ADV_INT.3, ADV_TDS.5, ADV_SPM.1, ADV_ARC, ADV_FSP, ADV_IMP, ADV_FSP.4, ADV_SPM, AGD_OPE.1, AGD_PRE.1, AGD_OPE, AGD_PRE, ALC_FLR.1, ALC_CMC.5, ALC_CMS.5, ALC_DEL.1, ALC_DVS.2, ALC_LCD.1, ALC_TAT.3, ALC_DEL, ALC_DVS, ALC_CMS, ALC_CMC, ALC_CMS.4, ALC_CMC.4, ATE_COV.3, ATE_DPT.3, ATE_FUN.2, ATE_IND.2, ATE_COV, AVA_VAN.5, AVA_VAN, ASE_TSS.2, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1Security Functional Requirements (SFR)
FAU_SAS.1, FAU_SAS.1.1, FCS_RNG.1, FCS_RNG.1.1, FCS_RNG.1.2, FCS_COP.1, FCS_COP.1.1, FCS_CKM.1, FCS_CKM.4, FDP_ITT.1, FDP_IFC.1, FDP_ACC.1, FDP_ITC.1, FDP_ITC.2, FDP_SDI.2, FDP_SDI.1, FDP_SDI.2.1, FDP_SDI.2.2, FDP_ACC.1.1, FDP_ACF.1, FDP_ACF.1.1, FDP_ACF.1.2, FDP_ACF.1.3, FDP_ACF.1.4, FDP_FLS.1, FMT_LIM.1, FMT_LIM.2, FMT_MSA.3, FMT_MSA.3.1, FMT_MSA.3.2, FMT_MSA.1, FMT_SMR.1, FMT_MSA.1.1, FMT_SMF.1, FMT_SMF.1.1, FPT_FLS.1, FPT_PHP.3, FPT_ITT.1, FRU_FLT.2, FTP_ITT.1Protection profiles
BSI-PP-0035Certificates
BSI-DSZ-CC-0837Side-channel analysis
Leak-Inherent, Physical Probing, physical probing, side channel, DPA, timing attacks, physical tampering, Malfunction, malfunction, fault injectionStandards
FIPS PUB 46-3, FIPS PUB 197, FIPS PUB 46, AIS31, ISO/IEC 7816, ISO/IEC 14443, ISO/IEC 7816-3, ISO/IEC 18092, CCMB-2009-07-001, CCMB-2009-07-002, CCMB-2009-07-003, CCMB-2009-07-004Cross-references
Incoming- ANSSI-CC-2015/08 - archived - Application IAS V4.2 sur la plateformeJavaCard ouverte MultiApp V3.1 masquée surle composant P60D080PVC(version du patch : 1.4)
Automated analysis
Automated inference - use with caution
All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. This applies equally to the Cross-references section below. If you want to know more about how this data is computed and how reliable it is, see our documentation on automated analysis. If you believe any information here is inaccurate or harmful, please submit feedback.Certificate ID
BSI-DSZ-CC-0837-2013Extracted SARs
ADV_ARC.1, ADV_FSP.5, ADV_IMP.2, ADV_INT.3, ADV_SPM.1, ADV_TDS.5, AGD_OPE.1, AGD_PRE.1, ALC_CMC.5, ALC_CMS.5, ALC_DEL.1, ALC_DVS.2, ALC_FLR.1, ALC_LCD.1, ALC_TAT.3, APE_CCL.1, APE_ECD.1, APE_INT.1, APE_OBJ.2, APE_REQ.2, APE_SPD.1, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.2, ATE_COV.3, ATE_DPT.3, ATE_FUN.2, ATE_IND.2, AVA_VAN.5Cross-references
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{
"_type": "sec_certs.sample.cc.CCCertificate",
"category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
"cert_link": null,
"dgst": "6e6d45dbf30497f8",
"heuristics": {
"_type": "sec_certs.sample.cc_eucc_common.Heuristics",
"annotated_references": null,
"cert_id": "BSI-DSZ-CC-0837-2013",
"cert_lab": [
"BSI"
],
"cpe_matches": null,
"direct_transitive_cves": null,
"eal": "EAL6+",
"extracted_sars": {
"_type": "Set",
"elements": [
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_DVS",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_OBJ",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_INT",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_REQ",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_CMS",
"level": 5
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_OBJ",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_INT",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_TAT",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_TSS",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_LCD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_IND",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_ECD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_DEL",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_ARC",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_COV",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_INT",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AGD_PRE",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_SPD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AGD_OPE",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_CMC",
"level": 5
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_DPT",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_CCL",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_SPD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_SPM",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_IMP",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_FSP",
"level": 5
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_ECD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AVA_VAN",
"level": 5
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_FLR",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_TDS",
"level": 5
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "APE_CCL",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_FUN",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_REQ",
"level": 2
}
]
},
"extracted_versions": {
"_type": "Set",
"elements": [
"-"
]
},
"indirect_transitive_cves": null,
"next_certificates": null,
"prev_certificates": null,
"protection_profiles": {
"_type": "Set",
"elements": [
"f6d23054061d72ba"
]
},
"related_cves": null,
"report_references": {
"_type": "sec_certs.sample.certificate.References",
"directly_referenced_by": {
"_type": "Set",
"elements": [
"ANSSI-CC-2014/86",
"BSI-DSZ-CC-0861-2014",
"BSI-DSZ-CC-0892-2014",
"NSCIB-CC-12-36243-CR",
"BSI-DSZ-CC-0893-2014"
]
},
"directly_referencing": null,
"indirectly_referenced_by": {
"_type": "Set",
"elements": [
"ANSSI-CC-2016/03",
"ANSSI-CC-2015/75",
"ANSSI-CC-2015/37",
"ANSSI-CC-2015/02",
"ANSSI-CC-2015/74",
"ANSSI-CC-2014/86",
"BSI-DSZ-CC-0861-2014",
"ANSSI-CC-2015/44",
"ANSSI-CC-2015/01",
"ANSSI-CC-2015/39",
"BSI-DSZ-CC-0892-V2-2015",
"NSCIB-CC-12-36243-CR2",
"ANSSI-CC-2015/30",
"BSI-DSZ-CC-0892-2014",
"ANSSI-CC-2015/04",
"ANSSI-CC-2015/08",
"BSI-DSZ-CC-0893-2014",
"ANSSI-CC-2015/03",
"ANSSI-CC-2016/04",
"ANSSI-CC-2015/38",
"NSCIB-CC-12-36243-CR",
"ANSSI-CC-2016/63",
"ANSSI-CC-2015/40",
"ANSSI-CC-2015/15",
"ANSSI-CC-2015/41"
]
},
"indirectly_referencing": null
},
"scheme_data": null,
"st_references": {
"_type": "sec_certs.sample.certificate.References",
"directly_referenced_by": {
"_type": "Set",
"elements": [
"ANSSI-CC-2015/08"
]
},
"directly_referencing": null,
"indirectly_referenced_by": {
"_type": "Set",
"elements": [
"ANSSI-CC-2015/08"
]
},
"indirectly_referencing": null
},
"verified_cpe_matches": null
},
"maintenance_updates": {
"_type": "Set",
"elements": [
{
"_type": "sec_certs.sample.cc.CCCertificate.MaintenanceReport",
"maintenance_date": "2014-02-04",
"maintenance_report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0837ma1a_pdf.pdf",
"maintenance_st_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0837ma1b_pdf.pdf",
"maintenance_title": "NXP Smart Card Controller P60D080/052/040PVC(y) and P60C080/052/040PVC(y) with IC dedicated Software"
}
]
},
"manufacturer": "NXP Semiconductors Germany GmbH Business Line Identification",
"manufacturer_web": "https://www.nxp.com",
"name": "NXP Smart Card Controller P60D080PVC and its major configurations P60D052PVC, P60D040PVC, P60C080PVC, P60C052PVC and P60C040PVC",
"not_valid_after": "2019-09-01",
"not_valid_before": "2013-06-24",
"pdf_data": {
"_type": "sec_certs.sample.cc_eucc_common.PdfData",
"cert_filename": null,
"cert_frontpage": null,
"cert_keywords": null,
"cert_metadata": null,
"report_filename": "0837a_pdf.pdf",
"report_frontpage": {
"DE": {
"cert_id": "BSI-DSZ-CC-0837-2013 ####",
"cert_item": "### NXP Smart Card Controller P60D080PVC and its major configurations P60D052PVC, P60D040PVC, P60C080PVC, P60C052PVC and P60C040PVC ####",
"cert_lab": "BSI",
"developer": "### NXP Semiconductors Germany GmbH BSI -",
"match_rules": [
"(BSI-DSZ-CC-.+?) (?:for|For) (.+?) from (.*)"
]
}
},
"report_keywords": {
"asymmetric_crypto": {},
"cc_cert_id": {
"DE": {
"BSI-DSZ-CC-0837": 1,
"BSI-DSZ-CC-0837-2013": 40
}
},
"cc_claims": {
"O": {
"O.C": 5
},
"R": {
"R.O": 5
}
},
"cc_protection_profile_id": {
"BSI": {
"BSI-CC-PP-0035-2007": 3
}
},
"cc_sar": {
"ADV": {
"ADV_ARC": 1,
"ADV_ARC.1": 1,
"ADV_FSP": 1,
"ADV_FSP.1": 1,
"ADV_FSP.2": 1,
"ADV_FSP.3": 1,
"ADV_FSP.4": 1,
"ADV_FSP.5": 2,
"ADV_FSP.6": 1,
"ADV_IMP": 1,
"ADV_IMP.1": 1,
"ADV_IMP.2": 2,
"ADV_INT": 1,
"ADV_INT.1": 1,
"ADV_INT.2": 1,
"ADV_INT.3": 2,
"ADV_SPM": 1,
"ADV_SPM.1": 2,
"ADV_TDS": 1,
"ADV_TDS.1": 1,
"ADV_TDS.2": 1,
"ADV_TDS.3": 1,
"ADV_TDS.4": 1,
"ADV_TDS.5": 2,
"ADV_TDS.6": 1
},
"AGD": {
"AGD_OPE": 1,
"AGD_OPE.1": 1,
"AGD_PRE": 1,
"AGD_PRE.1": 1
},
"ALC": {
"ALC_CMC": 1,
"ALC_CMC.1": 1,
"ALC_CMC.2": 1,
"ALC_CMC.3": 1,
"ALC_CMC.4": 1,
"ALC_CMC.5": 3,
"ALC_CMS": 1,
"ALC_CMS.1": 1,
"ALC_CMS.2": 1,
"ALC_CMS.3": 1,
"ALC_CMS.4": 1,
"ALC_CMS.5": 3,
"ALC_DEL": 1,
"ALC_DEL.1": 2,
"ALC_DVS": 1,
"ALC_DVS.1": 1,
"ALC_DVS.2": 3,
"ALC_FLR": 1,
"ALC_FLR.1": 6,
"ALC_FLR.2": 1,
"ALC_FLR.3": 1,
"ALC_LCD": 1,
"ALC_LCD.1": 2,
"ALC_LCD.2": 1,
"ALC_TAT": 1,
"ALC_TAT.1": 1,
"ALC_TAT.2": 1,
"ALC_TAT.3": 3
},
"APE": {
"APE_CCL.1": 1,
"APE_ECD.1": 1,
"APE_INT.1": 1,
"APE_OBJ.1": 1,
"APE_OBJ.2": 1,
"APE_REQ.1": 1,
"APE_REQ.2": 1,
"APE_SPD.1": 1
},
"ASE": {
"ASE_CCL": 1,
"ASE_CCL.1": 1,
"ASE_ECD": 1,
"ASE_ECD.1": 1,
"ASE_INT": 1,
"ASE_INT.1": 1,
"ASE_OBJ": 1,
"ASE_OBJ.1": 1,
"ASE_OBJ.2": 1,
"ASE_REQ.1": 1,
"ASE_REQ.2": 1,
"ASE_SPD": 1,
"ASE_SPD.1": 1,
"ASE_TSS": 1,
"ASE_TSS.1": 1,
"ASE_TSS.2": 3
},
"ATE": {
"ATE_COV": 1,
"ATE_COV.1": 1,
"ATE_COV.2": 2,
"ATE_COV.3": 2,
"ATE_DPT": 1,
"ATE_DPT.1": 1,
"ATE_DPT.2": 1,
"ATE_DPT.3": 3,
"ATE_DPT.4": 1,
"ATE_FUN": 2,
"ATE_FUN.1": 1,
"ATE_FUN.2": 2,
"ATE_IND": 1,
"ATE_IND.1": 1,
"ATE_IND.2": 1,
"ATE_IND.3": 1
},
"AVA": {
"AVA_VAN": 2,
"AVA_VAN.1": 1,
"AVA_VAN.2": 1,
"AVA_VAN.3": 1,
"AVA_VAN.4": 1,
"AVA_VAN.5": 2
}
},
"cc_security_level": {
"EAL": {
"EAL 4": 2,
"EAL 5": 3,
"EAL 6": 4,
"EAL 6 augmented": 3,
"EAL1": 7,
"EAL2": 3,
"EAL3": 4,
"EAL4": 7,
"EAL5": 7,
"EAL5+": 1,
"EAL6": 4,
"EAL7": 4
},
"ITSEC": {
"ITSEC Evaluation": 1
}
},
"cc_sfr": {},
"certification_process": {
"ConfidentialDocument": {
"Addendum, SmartMX2 family, Post Delivery Configuration, NXP Semiconductors, Rev. 3.1, 2012-12-12 (confidential document": 1,
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