ATMEL AT90SC7272C rev. D microcontroller

CSV information

Status archived
Valid from 11.03.2005
Valid until 01.09.2019
Scheme 🇫🇷 FR
Manufacturer ATMEL Smart Card ICs
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level ALC_DVS.2, EAL4+, AVA_VLA.4, ADV_IMP.2
Maintenance updates Rapport de maintenance M-2006/02 (11.03.2005) Certification report

Heuristics summary

Certificate ID: ANSSI-CC-2005/05

Certificate

certificate could not be downloaded, no link is available.

Certification report

Certification report PDF TXT

Extracted keywords

Hash functions
SHA-1
Randomness
RNG

Device models
ATMEL AT90SC7272C, ATMEL AT90SC9608RC, ATMEL AT90SC6404R

Security level
EAL4, EAL7, EAL41, EAL1, EAL3, EAL5, ITSEC E6 et
Security Assurance Requirements (SAR)
ACM_AUT.1, ACM_CAP.4, ACM_SCP.2, ACM_AUT, ACM_CAP, ACM_SCP, ADO_DEL.2, ADO_IGS.1, ADO_DEL, ADO_IGS, ADV_IMP.2, ADV_SPM.1, ADV_FSP.2, ADV_HLD.2, ADV_LLD.1, ADV_RCR.1, ADV_FSP, ADV_HLD, ADV_IMP, ADV_INT, ADV_LLD, ADV_RCR, ADV_SPM, AGD_ADM.1, AGD_USR.1, AGD_ADM, AGD_USR, ALC_DVS.2, ALC_FLR, ALC_LCD.1, ALC_TAT.1, ALC_DVS, ALC_TAT, ATE_COV.2, ATE_DPT.1, ATE_FUN.1, ATE_IND.2, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VLA.4, AVA_MSU.2, AVA_SOF.1, AVA_CCA, AVA_MSU, AVA_SOF, AVA_VLA, ASE_DES.1, ASE_ENV.1, ASE_INT.1, ASE_OBJ.1, ASE_PPC.1, ASE_REQ.1, ASE_SRE.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_SAA.1, FCS_CKM.1, FCS_COP.1, FDP_ACC.2, FDP_ACF.1, FDP_IFC.1, FDP_IFF.1, FDP_SDI.1, FIA_ATD.1, FIA_UAU.2, FIA_UID.2, FMT_MOF.1, FMT_MSA.1, FMT_MSA.3, FMT_SMR.1, FPR_UNO.1, FPT_PHP.2, FPT_PHP.3, FPT_TST.1
Certificates
Rapport de certification 2005/05, Rapport de certification 2003/11, Rapport de certification 2003/28, Rapport de certification 2004/02, Rapport de certification 2004/05
Evaluation facilities
CEA - LETI, CEA/LETI

Standards
ISO/IEC 15408:1999, CCIMB-2004-01-001, CCIMB-2004-01-002, CCIMB-2004-01-003, CCIMB-2004-01-004, CCIMB-99-031, CCIMB-99-032, CCIMB-99-033

File metadata

Title Rapport de certification 2005/05
Subject Micro-circuit ATMEL AT90SC7272C rev. D
Keywords CER/F/07.3
Author DCSSI
Creation date D:20050311132337+01'00'
Modification date D:20050311132346+01'00'
Pages 24
Creator Acrobat PDFMaker 5.0 pour Word
Producer Acrobat Distiller 5.0 (Windows)

References

Outgoing Incoming
  • ANSSI-CC-2005/49 - archived - ATMEL Secure Microcontroller AT90SC12872RCFT rev. E

Security target

Security target PDF TXT

Extracted keywords

Symmetric Algorithms
AES, E2, DES, TDES
Asymmetric Algorithms
DSA
Hash functions
SHA-1
Schemes
MAC
Randomness
RNG

Security level
EAL4, EAL4 augmented
Claims
O.TAMPER, O.CLON, O.OPERATE, O.FLAW, O.DIS_MECHANISM, O.DIS_MEMORY, O.MOD_MEMORY, O.CRYPTO, O.DEV_DIS, O.SOFT_DLV, O.SOFT_MECH, O.DEV_TOOLS, O.SOFT_ACS, O.DESIGN_ACS, O.DSOFT_ACS, O.MASK_FAB, O.MECH_ACS, O.TI_ACS, O.TOE_PRT, O.IC_DLV, O.DLV_PROTECT, O.DLV_AUDIT, O.DLV_RESP, O.TEST_OPERATE, O.USE_DIAG, O.USE_SYS, T.CLON, T.DIS_INFO, T.DIS_DEL, T.MOD_DEL, T.T_DEL, T.DIS_DESIGN, T.DIS_SOFT, T.DIS_DSOFT, T.DIS_TEST, T.DIS_TOOLS, T.DIS_PHOTOMASK, T.T_SAMPLE, T.T_PHOTOMASK, T.T_PRODUCT, T.MOD_DESIGN, T.MOD_PHOTOMASK, T.MOD_DSOFT, T.MOD_SOFT, A.SOFT_ARCHI, A.DEV_ORG, A.DLV_PROTECT, A.DLV_AUDIT, A.DLV_RESP, A.USE_TEST, A.USE_PROD, A.USE_DIAG, A.USE_SYS
Security Assurance Requirements (SAR)
ACM_AUT.1, ACM_CAP.4, ACM_SCP.2, ADO_DEL.2, ADO_IGS.1, ADV_IMP.2, ADV_FSP.2, ADV_HLD.2, ADV_LLD.1, ADV_RCR.1, ADV_SPM.1, AGD_ADM.1, AGD_USR.1, ALC_DVS.2, ALC_LCD.1, ALC_TAT.1, ATE_COV.2, ATE_DPT.1, ATE_FUN.1, ATE_IND.2, AVA_VLA.4, AVA_MSU.2, AVA_SOF.1
Security Functional Requirements (SFR)
FAU_SAA.1, FCS_COP.1, FCS_CKM.1, FDP_SDI.1, FDP_ACC.2, FDP_ACF.1, FDP_IFC.1, FDP_IFF.1, FIA_UAU.2, FIA_UID.2, FIA_ATD.1, FMT_MOF.1, FMT_MSA.1, FMT_SMR.1, FMT_SMF.1, FMT_MSA.3, FPR_UNO.1, FPT_TST.1, FPT_PHP.2, FPT_PHP.3

Side-channel analysis
DPA, SPA, physical tampering, malfunction, reverse engineering

Standards
FIPS PUB 46-3, FIPS PUB 180-1

File metadata

Title TPG0054.book
Creation date D:20041208082539Z
Modification date D:20041208115132Z
Pages 68
Creator FrameMaker 6.0
Producer Acrobat Distiller 5.0.5 (Windows)

Heuristics

Automated inference - use with caution

All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. For details on our data sources and inference methods, see our methodology. If you believe any information here is inaccurate or harmful, please submit feedback.

Certificate ID

ANSSI-CC-2005/05

Extracted SARs

ADV_FSP.2, ADV_HLD.2, ADV_IMP.2, ADV_LLD.1, ADV_RCR.1, ADV_SPM.1, AGD_ADM.1, AGD_USR.1, ALC_DVS.2, ALC_LCD.1, ALC_TAT.1, ASE_DES.1, ASE_ENV.1, ASE_INT.1, ASE_OBJ.1, ASE_PPC.1, ASE_REQ.1, ASE_SRE.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.1, ATE_FUN.1, ATE_IND.2, AVA_MSU.2, AVA_SOF.1, AVA_VLA.4

References

Updates

  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate was first processed.

Raw data 

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": null,
  "dgst": "e9d2ad418eedd620",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2005/05",
    "cert_lab": null,
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL4+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_LLD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ENV",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_SOF",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_DES",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_MSU",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_PPC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VLA",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_HLD",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_RCR",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_USR",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_ADM",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_SPM",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 2
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "-"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": null,
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2005/49"
        ]
      },
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2004/05",
          "ANSSI-CC-2003/28",
          "ANSSI-CC-2003/11"
        ]
      },
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2005/49",
          "ANSSI-CC-2006/15"
        ]
      },
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2004/05",
          "ANSSI-CC-2003/28",
          "ANSSI-CC-2003/11",
          "ANSSI-CC-2002/24"
        ]
      }
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": [
      {
        "_type": "sec_certs.sample.cc.CCCertificate.MaintenanceReport",
        "maintenance_date": "2005-03-11",
        "maintenance_report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/M-%202006_02.pdf",
        "maintenance_st_link": null,
        "maintenance_title": "Rapport de maintenance M-2006/02"
      }
    ]
  },
  "manufacturer": "ATMEL Smart Card ICs",
  "manufacturer_web": "https://www.atmel.com",
  "name": "ATMEL AT90SC7272C rev. D microcontroller",
  "not_valid_after": "2019-09-01",
  "not_valid_before": "2005-03-11",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "2005_05.pdf",
    "report_frontpage": {
      "FR": {}
    },
    "report_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {
        "FR": {
          "Rapport de certification 2003/11": 1,
          "Rapport de certification 2003/28": 1,
          "Rapport de certification 2004/02": 2,
          "Rapport de certification 2004/05": 1,
          "Rapport de certification 2005/05": 13
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {},
      "cc_sar": {
        "ACM": {
          "ACM_AUT": 1,
          "ACM_AUT.1": 1,
          "ACM_CAP": 1,
          "ACM_CAP.4": 1,
          "ACM_SCP": 1,
          "ACM_SCP.2": 1
        },
        "ADO": {
          "ADO_DEL": 1,
          "ADO_DEL.2": 1,
          "ADO_IGS": 1,
          "ADO_IGS.1": 1
        },
        "ADV": {
          "ADV_FSP": 1,
          "ADV_FSP.2": 1,
          "ADV_HLD": 1,
          "ADV_HLD.2": 1,
          "ADV_IMP": 1,
          "ADV_IMP.2": 5,
          "ADV_INT": 1,
          "ADV_LLD": 1,
          "ADV_LLD.1": 1,
          "ADV_RCR": 1,
          "ADV_RCR.1": 1,
          "ADV_SPM": 1,
          "ADV_SPM.1": 1
        },
        "AGD": {
          "AGD_ADM": 1,
          "AGD_ADM.1": 1,
          "AGD_USR": 1,
          "AGD_USR.1": 1
        },
        "ALC": {
          "ALC_DVS": 1,
          "ALC_DVS.2": 5,
          "ALC_FLR": 2,
          "ALC_LCD.1": 1,
          "ALC_TAT": 1,
          "ALC_TAT.1": 1
        },
        "ASE": {
          "ASE_DES.1": 1,
          "ASE_ENV.1": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ.1": 1,
          "ASE_PPC.1": 1,
          "ASE_REQ.1": 1,
          "ASE_SRE.1": 1,
          "ASE_TSS.1": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_COV.2": 1,
          "ATE_DPT": 1,
          "ATE_DPT.1": 1,
          "ATE_FUN": 1,
          "ATE_FUN.1": 1,
          "ATE_IND": 1,
          "ATE_IND.2": 1
        },
        "AVA": {
          "AVA_CCA": 1,
          "AVA_MSU": 1,
          "AVA_MSU.2": 1,
          "AVA_SOF": 1,
          "AVA_SOF.1": 1,
          "AVA_VLA": 1,
          "AVA_VLA.4": 5
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL1": 1,
          "EAL3": 1,
          "EAL4": 3,
          "EAL41": 1,
          "EAL5": 1,
          "EAL7": 2
        },
        "ITSEC": {
          "ITSEC E6 et": 1
        }
      },
      "cc_sfr": {
        "FAU": {
          "FAU_SAA.1": 1
        },
        "FCS": {
          "FCS_CKM.1": 1,
          "FCS_COP.1": 1
        },
        "FDP": {
          "FDP_ACC.2": 1,
          "FDP_ACF.1": 1,
          "FDP_IFC.1": 1,
          "FDP_IFF.1": 1,
          "FDP_SDI.1": 1
        },
        "FIA": {
          "FIA_ATD.1": 1,
          "FIA_UAU.2": 1,
          "FIA_UID.2": 1
        },
        "FMT": {
          "FMT_MOF.1": 1,
          "FMT_MSA.1": 1,
          "FMT_MSA.3": 1,
          "FMT_SMR.1": 1
        },
        "FPR": {
          "FPR_UNO.1": 1
        },
        "FPT": {
          "FPT_PHP.2": 1,
          "FPT_PHP.3": 1,
          "FPT_TST.1": 1
        }
      },
      "certification_process": {},
      "cipher_mode": {},
      "cplc_data": {},
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {},
      "crypto_scheme": {},
      "device_model": {
        "ATMEL": {
          "ATMEL AT90SC6404R": 2,
          "ATMEL AT90SC7272C": 26,
          "ATMEL AT90SC9608RC": 3
        }
      },
      "ecc_curve": {},
      "eval_facility": {
        "CEA-LETI": {
          "CEA - LETI": 1,
          "CEA/LETI": 3
        }
      },
      "hash_function": {
        "SHA": {
          "SHA1": {
            "SHA-1": 2
          }
        }
      },
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {},
      "pq_crypto": {},
      "randomness": {
        "RNG": {
          "RNG": 2
        }
      },
      "side_channel_analysis": {},
      "standard_id": {
        "CC": {
          "CCIMB-2004-01-001": 1,
          "CCIMB-2004-01-002": 1,
          "CCIMB-2004-01-003": 1,
          "CCIMB-2004-01-004": 1,
          "CCIMB-99-031": 1,
          "CCIMB-99-032": 1,
          "CCIMB-99-033": 1
        },
        "ISO": {
          "ISO/IEC 15408:1999": 2
        }
      },
      "symmetric_crypto": {},
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {},
      "vulnerability": {}
    },
    "report_metadata": {
      "/Author": "DCSSI",
      "/CreationDate": "D:20050311132337+01\u002700\u0027",
      "/Creator": "Acrobat PDFMaker 5.0 pour Word",
      "/Keywords": "CER/F/07.3",
      "/ModDate": "D:20050311132346+01\u002700\u0027",
      "/Producer": "Acrobat Distiller 5.0 (Windows)",
      "/Subject": "Micro-circuit ATMEL AT90SC7272C rev. D",
      "/Title": "Rapport de certification 2005/05",
      "pdf_file_size_bytes": 661042,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": []
      },
      "pdf_is_encrypted": true,
      "pdf_number_of_pages": 24
    },
    "st_filename": "cible2005_05.pdf",
    "st_frontpage": null,
    "st_keywords": {
      "asymmetric_crypto": {
        "FF": {
          "DSA": {
            "DSA": 2
          }
        }
      },
      "cc_cert_id": {},
      "cc_claims": {
        "A": {
          "A.DEV_ORG": 1,
          "A.DLV_AUDIT": 1,
          "A.DLV_PROTECT": 1,
          "A.DLV_RESP": 1,
          "A.SOFT_ARCHI": 1,
          "A.USE_DIAG": 1,
          "A.USE_PROD": 1,
          "A.USE_SYS": 1,
          "A.USE_TEST": 1
        },
        "O": {
          "O.CLON": 1,
          "O.CRYPTO": 2,
          "O.DESIGN_ACS": 1,
          "O.DEV_DIS": 1,
          "O.DEV_TOOLS": 1,
          "O.DIS_MECHANISM": 1,
          "O.DIS_MEMORY": 1,
          "O.DLV_AUDIT": 1,
          "O.DLV_PROTECT": 1,
          "O.DLV_RESP": 1,
          "O.DSOFT_ACS": 1,
          "O.FLAW": 1,
          "O.IC_DLV": 1,
          "O.MASK_FAB": 1,
          "O.MECH_ACS": 1,
          "O.MOD_MEMORY": 1,
          "O.OPERATE": 1,
          "O.SOFT_ACS": 1,
          "O.SOFT_DLV": 1,
          "O.SOFT_MECH": 1,
          "O.TAMPER": 1,
          "O.TEST_OPERATE": 1,
          "O.TI_ACS": 1,
          "O.TOE_PRT": 1,
          "O.USE_DIAG": 1,
          "O.USE_SYS": 1
        },
        "T": {
          "T.CLON": 2,
          "T.DIS_DEL": 2,
          "T.DIS_DESIGN": 2,
          "T.DIS_DSOFT": 2,
          "T.DIS_INFO": 2,
          "T.DIS_PHOTOMASK": 2,
          "T.DIS_SOFT": 2,
          "T.DIS_TEST": 2,
          "T.DIS_TOOLS": 2,
          "T.MOD_DEL": 2,
          "T.MOD_DESIGN": 2,
          "T.MOD_DSOFT": 2,
          "T.MOD_PHOTOMASK": 2,
          "T.MOD_SOFT": 2,
          "T.T_DEL": 2,
          "T.T_PHOTOMASK": 2,
          "T.T_PRODUCT": 2,
          "T.T_SAMPLE": 2
        }
      },
      "cc_protection_profile_id": {},
      "cc_sar": {
        "ACM": {
          "ACM_AUT.1": 1,
          "ACM_CAP.4": 1,
          "ACM_SCP.2": 1
        },
        "ADO": {
          "ADO_DEL.2": 1,
          "ADO_IGS.1": 1
        },
        "ADV": {
          "ADV_FSP.2": 1,
          "ADV_HLD.2": 1,
          "ADV_IMP.2": 3,
          "ADV_LLD.1": 1,
          "ADV_RCR.1": 1,
          "ADV_SPM.1": 1
        },
        "AGD": {
          "AGD_ADM.1": 1,
          "AGD_USR.1": 1
        },
        "ALC": {
          "ALC_DVS.2": 3,
          "ALC_LCD.1": 1,
          "ALC_TAT.1": 1
        },
        "ATE": {
          "ATE_COV.2": 1,
          "ATE_DPT.1": 1,
          "ATE_FUN.1": 1,
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