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Thinklogical TLX320 Matrix Switch
SERTIT-076 		Gemalto ECC CPU card - CPU e-purse application on GCX5.1 (MPH098) platform on NXP P5CD081V1A Version 1.0
ANSSI-CC-2011/05
name Thinklogical TLX320 Matrix Switch Gemalto ECC CPU card - CPU e-purse application on GCX5.1 (MPH098) platform on NXP P5CD081V1A Version 1.0
category Other Devices and Systems ICs, Smart Cards and Smart Card-Related Devices and Systems
scheme NO FR
not_valid_after 22.09.2021 01.09.2019
not_valid_before 22.09.2016 13.04.2011
report_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ANSSI-CC_2011-05en.pdf
st_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ThinklogicalSecurityTarget_1_3_TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ANSSI-CC-cible_2011-05en.pdf
manufacturer Thinklogical Gemalto / NXP Semiconductors
manufacturer_web https://www.thinklogical.com/ https://www.gemalto.com/
security_level EAL4 EAL4+, AVA_VAN.5, ALC_DVS.2
dgst a67b05a18bbe6cfc 1c639f9d703d2d91
heuristics/cert_id SERTIT-076 ANSSI-CC-2011/05
heuristics/cert_lab [] CEA
heuristics/extracted_sars AGD_OPE.1, ASE_ECD.1, ADV_FSP.4, ADV_TDS.3, ALC_DEL.1, ALC_CMS.4, ALC_DVS.1, ALC_LCD.1, ADV_ARC.1, ADV_IMP.1, ASE_SPD.1, ASE_INT.1, ASE_OBJ.2, ASE_CCL.1, ASE_REQ.2, ATE_IND.2, ASE_TSS.1, ATE_COV.2, ATE_FUN.1, ALC_CMC.4, AGD_PRE.1, AVA_VAN.3, ALC_TAT.1, ATE_DPT.2 ASE_TSS.2, AGD_OPE.1, ASE_ECD.1, ADV_FSP.4, ATE_DPT.1, ADV_TDS.3, ALC_DEL.1, ALC_CMS.4, ALC_LCD.1, ADV_ARC.1, ADV_IMP.1, ASE_SPD.1, ASE_INT.1, ASE_OBJ.2, ADV_COMP.1, ASE_CCL.1, ASE_REQ.2, ATE_IND.2, AVA_VAN.5, ATE_COV.2, ATE_FUN.1, ALC_DVS.2, ALC_CMC.4, AGD_PRE.1, ALC_TAT.1
heuristics/extracted_versions - 5.1, 1.0
heuristics/report_references/directly_referencing {} BSI-DSZ-CC-0555-2009
heuristics/report_references/indirectly_referencing {} BSI-DSZ-CC-0555-2009
heuristics/scheme_data
  • category: Other Devices and Systems
  • certification_date: 22.09.2016
  • developer: Thinklogical
  • enhanced:
    • category: Other Devices and Systems
    • cert_id: SERTIT-076
    • certification_date: 22.09.2016
    • description: The TOE provides remote connections from a set of shared computers to a set of shared peripherals. The switching capability of the TOE is used to connect ports on a particular computer to a particular peripheral set. The corresponding electronic signal from a computer port is transformed into an optical signal by the Velocity extender, transmitted through an optical fiber, switched by the TOE to another optical fiber, and then transformed back to an electronic form by the Velocity extender. The resulting signal is used by the shared peripherals. The TOE provides a capability to dynamically change the switching configuration to connect a particular computer to a particular peripheral set. The TOE enforces secure separation of information flows corresponding to different switched connections. The corresponding Data Separation Security Policy is the main security feature of the TOE.
    • developer: Thinklogical
    • documents: frozendict({'cert': [frozendict({'href': 'https://sertit.no/getfile.php/135040-1607952626/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20C%20v1.0.pdf'})], 'target': [frozendict({'href': 'https://sertit.no/getfile.php/135043-1607952629/SERTIT/Sertifikater/2016/76/ThinklogicalSecurityTarget_1_3_TLX320.pdf'})], 'report': [frozendict({'href': 'https://sertit.no/getfile.php/135046-1607952632/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf'})]})
    • evaluation_facility: Norconsult AS
    • level: EAL 4
    • mutual_recognition: CCRA, SOG-IS
    • product: TLX320 Matrix Switch Chassis (TLX-MSC-000320 Rev A), TLX48 / TLX320 Matrix Switch Data Input and Output Card, 16 Ports, SFP+, Multi-Mode (TLX-MSD-M00016 Rev A), Single Mode (TLX-MSDS00016 Rev A), Velocity Matrix Switch 320 Data Input Retimer Card, 16 Ports, SFP+, Multi-Mode (VXM-D00T16 Rev A), Single Mode (VXM-D0ST16 Rev A)
  • product: Thinklogical TLX320 Matrix Switch
  • url: https://sertit.no/certified-products/product-archive/thinklogical-tlx320-matrix-switch
heuristics/st_references/directly_referencing {} BSI-DSZ-CC-0555-2009
heuristics/st_references/indirectly_referencing {} BSI-DSZ-CC-0555-2009
pdf_data/report_filename 20160922 Sertit-076 CR v1.0 Certification Report TLX320.pdf ANSSI-CC_2011-05en.pdf
pdf_data/report_frontpage
  • FR:
  • FR:
    • cc_security_level: EAL 4 augmented ALC_DVS.2, AVA_VAN.5
    • cc_version: Common Criteria version 3.1 revision 3
    • cert_id: ANSSI-CC-2011/05
    • cert_item: Gemalto ECC CPU card on GCX5.1 (MPH098) platform on NXP P5CD081V1A
    • cert_item_version: CPU e-purse on GCX5.1 MPH098 Version 1.0
    • cert_lab: CEA - LETI 17 rue des martyrs, 38054 Grenoble Cedex 9, France Phone: +33 (0)4 38 78 37 78, email : elisabeth.crochon@cea.fr
    • developer: Gemalto SA 6 rue de la Verrerie, 92197 Meudon, France NXP Semiconductors GmbH Stresemannallee 101, D-22502 Hamburg, Germany Sponsor Gemalto SA 6 rue de la Verrerie, 92197 Meudon, France
    • match_rules: ['Certification report reference(.+)Product name(.+)Product reference(.+)Protection profile conformity(.+)Evaluation criteria and version(.+)Evaluation level(.+)Developer\\(s\\)(.+)Evaluation facility(.+)Recognition arrangements']
    • ref_protection_profiles: None
pdf_data/report_keywords/cc_cert_id
  • NO:
    • SERTIT-076: 16
  • DE:
    • BSI-DSZ-CC-0555-2009: 2
  • FR:
    • ANSSI-CC-2011/05: 2
pdf_data/report_keywords/cc_security_level
  • EAL:
    • EAL 2: 1
    • EAL 4: 19
    • EAL1: 1
    • EAL7: 1
  • EAL:
    • EAL 1: 1
    • EAL 3: 1
    • EAL 4: 2
    • EAL 4 augmented: 2
    • EAL 5: 1
    • EAL 7: 1
    • EAL4: 2
    • EAL5: 1
    • EAL7: 1
  • ITSEC:
    • ITSEC E6 High: 1
pdf_data/report_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 1
    • ADV_FSP.4: 1
    • ADV_IMP.1: 1
    • ADV_TDS.3: 1
  • AGD:
    • AGD_OPE.1: 1
    • AGD_PRE.1: 1
  • ALC:
    • ALC_CMC.4: 1
    • ALC_CMS.4: 1
    • ALC_DEL.1: 1
    • ALC_DVS.1: 1
    • ALC_FLR: 1
    • ALC_LCD.1: 1
    • ALC_TAT.1: 1
  • ASE:
    • ASE_CCL.1: 1
    • ASE_ECD.1: 1
    • ASE_INT.1: 1
    • ASE_OBJ.2: 1
    • ASE_REQ.2: 1
    • ASE_SPD.1: 1
    • ASE_TSS.1: 1
  • ATE:
    • ATE_COV.2: 1
    • ATE_DPT.1: 1
    • ATE_FUN.1: 1
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.3: 1
  • ADV:
    • ADV_ARC: 1
    • ADV_FSP: 1
    • ADV_IMP: 1
    • ADV_INT: 1
    • ADV_SPM: 1
    • ADV_TDS: 1
  • AGD:
    • AGD_OPE: 1
    • AGD_PRE: 1
  • ALC:
    • ALC_CMC: 1
    • ALC_CMS: 1
    • ALC_DEL: 1
    • ALC_DVS: 1
    • ALC_DVS.2: 2
    • ALC_FLR: 1
    • ALC_LCD: 1
    • ALC_TAT: 1
  • ASE:
    • ASE_CCL: 1
    • ASE_ECD: 1
    • ASE_INT: 1
    • ASE_OBJ: 1
    • ASE_REQ: 1
    • ASE_SPD: 1
    • ASE_TSS: 1
    • ASE_TSS.2: 1
  • ATE:
    • ATE_COV: 1
    • ATE_DPT: 1
    • ATE_FUN: 1
    • ATE_IND: 1
  • AVA:
    • AVA_VAN: 2
    • AVA_VAN.5: 2
pdf_data/report_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 1
    • FDP_IFC.1: 1
    • FDP_IFF.1: 1
    • FDP_ITC.1: 1
pdf_data/report_keywords/cc_claims
  • A:
    • A.EMISSIO: 1
    • A.MANAGE: 1
    • A.NOEVIL: 1
    • A.PHYSICAL: 1
    • A.SCENARIO: 1
  • O:
    • O.CONF: 1
    • O.CONNECT: 1
  • OE:
    • OE.EMISSIO: 1
    • OE.MANAGE: 1
    • OE.NOEVIL: 1
    • OE.PHYSICAL: 1
    • OE.SCENARIO: 1
  • T:
    • T.ATTACK: 1
    • T.INSTALL: 1
    • T.RESIDUAL: 1
    • T.STATE: 1
pdf_data/report_keywords/vendor
  • Microsoft:
    • Microsoft: 3
  • Gemalto:
    • Gemalto: 15
  • NXP:
    • NXP: 24
    • NXP Semiconductors: 2
pdf_data/report_keywords/eval_facility
  • Norconsult:
    • Norconsult AS: 1
  • CEA-LETI:
    • CEA - LETI: 1
pdf_data/report_keywords/asymmetric_crypto
  • ECC:
    • ECC:
      • ECC: 26
pdf_data/report_keywords/standard_id
  • CC:
    • CCMB-2012-09-001: 1
    • CCMB-2012-09-002: 1
    • CCMB-2012-09-003: 1
    • CCMB-2012-09-004: 1
  • ISO:
    • ISO/IEC 15408: 4
  • CC:
    • CCMB-2009-07-001: 1
    • CCMB-2009-07-002: 1
    • CCMB-2009-07-003: 1
    • CCMB-2009-07-004: 1
pdf_data/report_keywords/certification_process
  • OutOfScope:
    • - The NXP P5CD081 IC The Other applications1 on the card are written in java language and are out of scope of the TOE. 1.2.4. Life cycle The product’s life cycle is organised as follow: 1 Applications: 1
    • out of scope: 1
pdf_data/report_metadata
  • /AAPL:Keywords: ['ugradert']
  • /Author: Rage, Arne Høye
  • /CreationDate: D:20160922162516Z00'00'
  • /Creator: Microsoft Word
  • /Keywords: ugradert
  • /ModDate: D:20160922162516Z00'00'
  • /Producer: Mac OS X 10.11.6 Quartz PDFContext
  • /Title: tittel
  • pdf_file_size_bytes: 875983
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 17
pdf_data/st_filename ThinklogicalSecurityTarget_1_3_TLX320.pdf ANSSI-CC-cible_2011-05en.pdf
pdf_data/st_keywords/cc_cert_id
  • DE:
    • BSI-DSZ-CC-0555: 1
    • BSI-DSZ-CC-0555-: 1
    • BSI-DSZ-CC-0555-2009: 4
  • NL:
    • CC-0555-2009: 1
pdf_data/st_keywords/cc_protection_profile_id
  • BSI:
    • BSI-PP-0035: 1
pdf_data/st_keywords/cc_security_level
  • EAL:
    • EAL 4: 1
    • EAL4: 7
  • EAL:
    • EAL4: 4
    • EAL4 augmented: 3
    • EAL4+: 2
    • EAL5: 1
    • EAL5 augmented: 1
    • EAL5+: 2
pdf_data/st_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 2
    • ADV_FSP.4: 2
    • ADV_IMP.1: 2
    • ADV_TDS.3: 2
  • AGD:
    • AGD_OPE.1: 2
    • AGD_PRE.1: 2
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS.4: 2
    • ALC_DEL.1: 2
    • ALC_DVS.1: 2
    • ALC_LCD.1: 2
    • ALC_TAT.1: 2
  • ATE:
    • ATE_COV.2: 2
    • ATE_DPT.2: 2
    • ATE_FUN.1: 2
    • ATE_IND.2: 2
  • AVA:
    • AVA_VAN.3: 2
  • ADV:
    • ADV_ARC.1: 8
    • ADV_COMP.1: 2
    • ADV_FSP.1: 5
    • ADV_FSP.2: 4
    • ADV_FSP.4: 11
    • ADV_IMP: 1
    • ADV_IMP.1: 5
    • ADV_TDS.1: 3
    • ADV_TDS.2: 1
    • ADV_TDS.3: 11
  • AGD:
    • AGD_OPE.1: 8
    • AGD_PRE.1: 6
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS.1: 2
    • ALC_CMS.4: 1
    • ALC_DEL.1: 2
    • ALC_DVS.1: 1
    • ALC_DVS.2: 7
    • ALC_LCD.1: 5
    • ALC_TAT.1: 5
  • ASE:
    • ASE_CCL.1: 1
    • ASE_ECD.1: 4
    • ASE_INT.1: 5
    • ASE_OBJ.2: 3
    • ASE_REQ.1: 2
    • ASE_REQ.2: 2
    • ASE_SPD.1: 2
    • ASE_TSS.1: 1
    • ASE_TSS.2: 1
  • ATE:
    • ATE_COV.1: 4
    • ATE_COV.2: 4
    • ATE_DPT.1: 2
    • ATE_FUN.1: 8
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.5: 6
pdf_data/st_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 7
    • FDP_ETC.1.1: 1
    • FDP_ETC.1.2: 1
    • FDP_IFC.1: 7
    • FDP_IFC.1.1: 1
    • FDP_IFF.1: 7
    • FDP_IFF.1.1: 1
    • FDP_IFF.1.2: 1
    • FDP_IFF.1.3: 1
    • FDP_IFF.1.4: 1
    • FDP_IFF.1.5: 1
    • FDP_ITC.1: 7
    • FDP_ITC.1.1: 1
    • FDP_ITC.1.2: 1
    • FDP_ITC.1.3: 1
  • FMT:
    • FMT_MSA.3: 3
  • FAU:
    • FAU_ARP.1: 10
    • FAU_ARP.1.1: 2
    • FAU_GEN: 1
    • FAU_GEN.1: 10
    • FAU_GEN.1.1: 2
    • FAU_GEN.1.2: 2
    • FAU_SAA: 1
    • FAU_SAA.1: 13
    • FAU_SAA.1.1: 3
    • FAU_SAA.1.2: 1
    • FAU_SAR: 1
    • FAU_SAR.1: 3
    • FAU_SAR.1.1: 2
    • FAU_SAR.1.2: 2
    • FAU_SAS.1: 1
    • FAU_STG: 1
    • FAU_STG.1: 10
    • FAU_STG.1.1: 2
    • FAU_STG.1.2: 2
  • FCO:
    • FCO_NRO: 6
    • FCO_NRO.1: 3
    • FCO_NRO.2: 2
    • FCO_NRO.2.2: 3
    • FCO_NRO.2.3: 3
  • FCS:
    • FCS_CKM: 11
    • FCS_CKM.1: 11
    • FCS_CKM.1.1: 1
    • FCS_CKM.2: 5
    • FCS_CKM.2.1: 1
    • FCS_CKM.3: 5
    • FCS_CKM.3.1: 2
    • FCS_CKM.4: 18
    • FCS_CKM.4.1: 2
    • FCS_COP: 11
    • FCS_COP.1: 17
    • FCS_COP.1.1: 2
  • FDP:
    • FDP_ACC: 31
    • FDP_ACC.1: 27
    • FDP_ACC.1.1: 1
    • FDP_ACC.2: 9
    • FDP_ACC.2.2: 1
    • FDP_ACF: 11
    • FDP_ACF.1: 33
    • FDP_ACF.1.1: 1
    • FDP_ACF.1.2: 1
    • FDP_ACF.1.3: 1
    • FDP_ACF.1.4: 1
    • FDP_IFC: 12
    • FDP_IFC.1: 20
    • FDP_IFC.1.1: 1
    • FDP_IFC.2: 3
    • FDP_IFCC: 1
    • FDP_IFF: 5
    • FDP_IFF.1: 14
    • FDP_IFF.1.1: 1
    • FDP_IFF.1.2: 1
    • FDP_IFF.1.3: 1
    • FDP_IFF.1.4: 1
    • FDP_IFF.1.5: 1
    • FDP_ITC: 6
    • FDP_ITC.1: 8
    • FDP_ITC.1.1: 1
    • FDP_ITC.1.2: 1
    • FDP_ITC.1.3: 1
    • FDP_ITC.2: 4
    • FDP_ITT.1: 1
    • FDP_RIP: 10
    • FDP_RIP.1: 3
    • FDP_RIP.1.1: 1
    • FDP_ROL: 8
    • FDP_ROL.1: 4
    • FDP_ROL.1.1: 1
    • FDP_ROL.1.2: 1
    • FDP_SDI.1: 2
    • FDP_SDI.2: 5
    • FDP_SDI.2.2: 2
    • FDP_UCT: 1
    • FDP_UCT.1: 5
    • FDP_UCT.1.1: 2
    • FDP_UIT.1: 8
    • FDP_UIT.1.1: 2
    • FDP_UIT.1.2: 2
    • FDP_UTC.1: 1
  • FIA:
    • FIA_ATD: 5
    • FIA_ATD.1: 4
    • FIA_ATD.1.1: 1
    • FIA_SOS: 1
    • FIA_SOS.2: 6
    • FIA_SOS.2.1: 2
    • FIA_SOS.2.2: 2
    • FIA_UAU: 23
    • FIA_UAU.1: 4
    • FIA_UAU.1.1: 1
    • FIA_UAU.1.2: 1
    • FIA_UAU.3: 2
    • FIA_UAU.3.1: 2
    • FIA_UAU.3.2: 2
    • FIA_UAU.4: 2
    • FIA_UAU.4.1: 1
    • FIA_UAU.6: 2
    • FIA_UAU.6.1: 1
    • FIA_UID: 4
    • FIA_UID.1: 21
    • FIA_UID.2: 1
    • FIA_USB: 4
    • FIA_USB.1: 4
    • FIA_USB.1.1: 1
    • FIA_USB.1.2: 1
    • FIA_USB.1.3: 1
  • FMT:
    • FMT_LIM.1: 2
    • FMT_LIM.2: 2
    • FMT_MOF.1: 5
    • FMT_MSA: 38
    • FMT_MSA.1: 13
    • FMT_MSA.1.1: 2
    • FMT_MSA.2: 1
    • FMT_MSA.2.1: 1
    • FMT_MSA.3: 17
    • FMT_MSA.3.1: 2
    • FMT_MSA.3.2: 2
    • FMT_MTD: 1
    • FMT_MTD.1: 5
    • FMT_MTD.1.1: 2
    • FMT_SMF: 4
    • FMT_SMF.1: 14
    • FMT_SMF.1.1: 1
    • FMT_SMR: 1
    • FMT_SMR.1: 27
    • FMT_SMR.1.1: 2
    • FMT_SMR.1.2: 2
  • FPR:
    • FPR_UNO: 1
    • FPR_UNO.1: 8
    • FPR_UNO.1.1: 2
  • FPT:
    • FPT_FLS: 1
    • FPT_FLS.1: 9
    • FPT_FLS.1.1: 2
    • FPT_ITC: 1
    • FPT_ITC.1: 4
    • FPT_ITC.1.1: 2
    • FPT_ITI: 1
    • FPT_ITI.1: 8
    • FPT_ITI.1.1: 2
    • FPT_ITI.1.2: 2
    • FPT_ITT.1: 1
    • FPT_PHP: 2
    • FPT_PHP.1: 2
    • FPT_PHP.2: 4
    • FPT_PHP.2.2: 2
    • FPT_PHP.2.3: 2
    • FPT_PHP.3: 11
    • FPT_PHP.3.1: 2
    • FPT_RCV.4: 7
    • FPT_RCV.4.1: 2
    • FPT_RPL: 1
    • FPT_RPL.1: 5
    • FPT_RPL.1.1: 2
    • FPT_RPL.1.2: 2
    • FPT_STM.1: 5
    • FPT_TDC: 3
    • FPT_TDC.1: 3
    • FPT_TDC.1.1: 1
    • FPT_TDC.1.2: 1
    • FPT_TST: 1
    • FPT_TST.1: 7
    • FPT_TST.1.1: 2
    • FPT_TST.1.2: 2
    • FPT_TST.1.3: 2
  • FRU:
    • FRU_FLT.2: 2
  • FTP:
    • FTP_ITC.1: 9
    • FTP_TRP.1: 9
pdf_data/st_keywords/cc_claims
  • A:
    • A.ACCESS: 1
    • A.EMISSION: 2
    • A.MANAGE: 2
    • A.NOEVIL: 2
    • A.PHYSICAL: 2
    • A.SCENARIO: 2
  • O:
    • O.CONF: 7
    • O.CONNECT: 3
    • O.CRYPTOGRAPHY: 1
  • OE:
    • OE.EMISSION: 2
    • OE.INSTAL: 1
    • OE.MANAGE: 4
    • OE.NOEVIL: 2
    • OE.PHYSICAL: 2
    • OE.SCENARIO: 2
  • T:
    • T.ATTACK: 3
    • T.COMINT: 1
    • T.INSTALL: 3
    • T.RESIDUAL: 3
    • T.STATE: 3
  • A:
    • A.PHYSICAL: 4
    • A.PROTECTION_AFTER_TOE_DE: 1
    • A.PROTECTION_AFTER_TOE_DELIVERY: 3
  • D:
    • D.COUNTERS: 6
    • D.EM: 13
    • D.EP_CODE: 5
    • D.EP_IVDATA: 3
    • D.EP_IV_DATA: 1
    • D.EP_STATE: 5
    • D.KEYS: 9
    • D.LOG_DATA: 4
  • O:
    • O.AUTH: 9
    • O.CONFID_DATA: 1
    • O.CONF_DATA: 8
    • O.EM: 6
    • O.HW_AES: 1
    • O.INTEG_DATA: 6
    • O.JAVAOBJECT: 10
    • O.MEM_ACCE: 1
    • O.OPERATE: 13
    • O.RECORD: 5
    • O.REPLAY: 7
    • O.RND: 1
    • O.SFR_ACCES: 1
    • O.TAMPER: 11
  • OE:
    • OE.DEBIT_BEFORE_CREDIT: 3
    • OE.PHYSICAL: 3
    • OE.PROTECTION_AFTER_TOE_DELIVERY: 3
    • OE.PURSE_BEHAVIOR: 3
    • OE.SECRET_MNGT: 3
  • OP:
    • OP.ARRAY_ACCESS: 2
    • OP.CREATE: 4
    • OP.INSTANCE_FIELD: 1
    • OP.INVK_INTERFACE: 4
    • OP.INVK_VIRTUAL: 2
    • OP.JAVA: 3
    • OP.PUT: 3
    • OP.THROW: 2
    • OP.TYPE_ACCESS: 2
  • OSP:
    • OSP.DEBIT_BEFORE_CREDIT: 3
    • OSP.PURSE_BEHAVIOR: 4
    • OSP.SECRET_MNGT: 4
  • R:
    • R.JAVA: 5
  • T:
    • T.COUNTERFEITING: 2
    • T.COUNTERFEITING_AUTH: 2
    • T.COUNTERFEITING_AUTOLOAD: 6
    • T.COUNTERFEITING_CREDIT: 2
    • T.COUNTERFEITING_DEBIT: 6
    • T.COUNTERFEITING_UPDATE: 4
    • T.DISCLOSURE_KEYS: 9
    • T.INTEG: 3
    • T.INTEG_: 1
    • T.INTEG_CODE: 5
    • T.INTEG_COUNTERS: 5
    • T.INTEG_EM: 5
    • T.INTEG_EP_IVDATA: 2
    • T.INTEG_EP_STATE: 5
    • T.INTEG_IVDATA: 2
    • T.INTEG_KEYS: 4
    • T.INTEG_LOG_DATA: 4
    • T.REPLAY: 2
    • T.REPLAY_AUTOLOAD: 4
    • T.REPLAY_CREDIT: 3
    • T.REPLAY_DEBIT: 4
    • T.REPLAY_UPDATE: 3
    • T.RND: 1
pdf_data/st_keywords/vendor
  • Gemalto:
    • Gemalto: 19
  • NXP:
    • NXP: 18
    • NXP Semiconductors: 2
pdf_data/st_keywords/symmetric_crypto
  • AES_competition:
    • AES:
      • AES: 34
  • DES:
    • 3DES:
      • TDEA: 1
      • Triple-DES: 3
    • DES:
      • DES: 6
pdf_data/st_keywords/asymmetric_crypto
  • ECC:
    • ECC:
      • ECC: 237
pdf_data/st_keywords/crypto_scheme
  • MAC:
    • MAC: 12
pdf_data/st_keywords/randomness
  • RNG:
    • RND: 2
    • RNG: 6
pdf_data/st_keywords/side_channel_analysis
  • FI:
    • Malfunction: 4
    • Physical tampering: 1
    • malfunction: 3
    • physical tampering: 13
  • SCA:
    • Leak-Inherent: 5
    • Physical Probing: 2
    • physical probing: 4
  • other:
    • JIL: 1
pdf_data/st_keywords/standard_id
  • CC:
    • CCMB-2009-07-001: 1
    • CCMB-2009-07-002: 1
    • CCMB-2009-07-003: 1
    • CCMB-2009-07-004: 1
  • FIPS:
    • FIPS PUB 197: 2
    • FIPS PUB 46-3: 1
pdf_data/st_keywords/javacard_version
  • JavaCard:
    • Java Card 2.2: 1
pdf_data/st_keywords/javacard_api_const
  • misc:
    • TYPE_ACCESS: 2
pdf_data/st_keywords/javacard_packages
  • javacard:
    • javacard.security: 1
pdf_data/st_keywords/certification_process
  • OutOfScope:
    • Crypto libs) written in native language, • The IC NXP P5CD081 The elements out of scope of the TOE are: • Other application(s: 1
    • libraries itself) (Crypto libs) written in native language, • The IC NXP P5CD081 The elements out of scope of the TOE are: • Other application(s) written in java language 2.3.2 Logical scope of the TOE The: 1
    • out of scope: 1
pdf_data/st_metadata
  • /Author: MICHELE ROBERTS
  • /CreationDate: D:20160922164335+00'00'
  • /Creator: Microsoft Word
  • /ModDate: D:20160922164335+00'00'
  • /Title:
  • pdf_file_size_bytes: 487151
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 22
  • /CreationDate: D:20110629163023+02'00'
  • /Keywords:
  • /ModDate: D:20110629163023+02'00'
  • /Producer: Acrobat Distiller 7.0.5 (Windows)
  • pdf_file_size_bytes: 510681
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 103
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