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ST33TPHF2E mode TPM 1.2, TPM Firmware 0x49.0x14 & 0x49.0x15
Certificate details
| Status | archived |
|---|---|
| Valid from | 06.11.2019 |
| Valid until | 06.11.2024 |
| Scheme | 🇫🇷 FR |
| Manufacturer | STMicroelectronics |
| Category | Trusted Computing |
| Security level | AVA_VAN.4, ALC_FLR.1, EAL4+ |
| Protection profiles |
Certificate
certificate could not be downloaded, no link is available.
Certification report
Extracted keywords
Symmetric Algorithms
AES, DES, HMACHash functions
SHA-1, SHA-256Randomness
TRNGLibraries
NesLib 5.1.0Block cipher modes
CTR, CFBTrusted Execution Environments
SEVendor
STMSecurity level
EAL 1, EAL 4, EAL 6, EAL 4+Claims
A.CSecurity Assurance Requirements (SAR)
ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_OPE, AGD_PRE, ALC_CMC, ALC_CMS, ALC_DEL, ALC_DVS, ALC_FLR, ALC_LCD, ALC_TAT, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VAN, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_REQ, ASE_SPD, ASE_TSSEvaluation facilities
SERMAStandards
AIS 31Security target
Extracted keywords
Symmetric Algorithms
AES, DES, 3DES, HMACAsymmetric Algorithms
RSA 512, RSA-2048Hash functions
SHA-1, SHA-256Schemes
MACRandomness
TRNG, RNGEngines
NESCRYPTLibraries
NesLib 5.1.0Block cipher modes
CTR, CFBVendor
STMicroelectronicsSecurity level
EAL4, EAL4 augmentedClaims
A.CSecurity Assurance Requirements (SAR)
ADV_FSP.4, ADV_ARC.1, ADV_TDS.3, ADV_IMP.3, AGD_OPE.1, AGD_PRE.1, ALC_FLR.1, ALC_CMC.4, ALC_CMS.4, ALC_DEL.1, ALC_DVS, ALC_LCD.1, ALC_TAT.1, ATE_COV.2, ATE_DPT.1, ATE_FUN.1, ATE_IND.2, AVA_VAN.4, ASE_INT.1, ASE_CCL.1, ASE_SPD.1, ASE_OBJ.2, ASE_ECD.1, ASE_REQ.2, ASE_TSS.1Security Functional Requirements (SFR)
FAU_GEN.1, FCO_NRO, FCO_NRO.1, FCS_RNG, FCS_RNG.1, FCS_RNG.1.1, FCS_RNG.1.2, FCS_CKM.1, FCS_CKM.2, FCS_COP.1, FCS_CKM.4, FCS_CKM.1.1, FCS_CKM.4.1, FCS_COP.1.1, FCS_CKM, FCS_COP, FDP_ACC.1, FDP_IFC.1, FDP_ITC.1, FDP_ITC.2, FDP_ACF, FDP_ACF.1, FDP_ACF.1.1, FDP_ACF.1.2, FDP_ACF.1.3, FDP_ACF.1.4, FDP_ACC.1.1, FDP_UIT, FDP_UIT.1.1, FDP_UIT.1.2, FDP_ACC, FDP_RIP.1, FDP_ETC.2, FDP_UCT, FDP_TDC.1, FDP_UCT.1, FDP_UIT.1, FIA_UID.1, FIA_UID.1.1, FIA_UID.1.2, FIA_UAU.1, FIA_UAU.1.1, FIA_UAU.1.2, FIA_UAU.5, FIA_UAU.5.1, FIA_UAU.5.2, FIA_AFL.1, FIA_AFL.1.1, FIA_AFL.1.2, FIA_UAU.4, FIA_UAU.6, FIA_USB.1, FMT_SMF.1, FMT_MSA.2, FMT_MSA.1, FMT_SMR.1, FMT_MSA.2.1, FMT_SMF.1.1, FMT_MSA.3, FMT_MSA, FMT_MSA.3.1, FMT_MSA.3.2, FMT_MSA.1.1, FMT_MTD, FMT_MTD.1, FPR_UNL.1, FPT_TDC.1, FPT_TDC.1.1, FPT_TDC.1.2, FPT_FLS.1, FPT_FLS.1.1, FPT_PHP.3, FPT_PHP.3.1, FPT_STM.1, FPT_TST.1, FTP_ITC.1, FTP_TRP.1Protection profiles
BSI-PP-0030-2008-MA-02Side-channel analysis
physical probing, side channel, SPA, DPA, timing attacksStandards
FIPS 140-2, FIPS PUB 197, FIPS PUB 180-2, FIPS 180-2, FIPS 197, FIPS 46-3, SP 800-38A, SP 800-17, SP 800-90A, PKCS#1, AIS20, AIS 20, AIS 31, RFC2104, CCMB-2012-09-003, CCMB-2012-09-002, CCMB-2012-09-001, CCMB-2012-09-04Automated analysis
Automated inference - use with caution
All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. This applies equally to the Cross-references section below. If you want to know more about how this data is computed and how reliable it is, see our documentation on automated analysis. If you believe any information here is inaccurate or harmful, please submit feedback.Certificate ID
ANSSI-CC-2019/52Extracted SARs
ADV_ARC.1, ADV_FSP.4, ADV_IMP.3, ADV_TDS.3, AGD_OPE.1, AGD_PRE.1, ALC_CMC.4, ALC_CMS.4, ALC_DEL.1, ALC_FLR.1, ALC_LCD.1, ALC_TAT.1, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.1, ATE_FUN.1, ATE_IND.2, AVA_VAN.4Similar certificates
| Name | Certificate ID | Actions |
|---|---|---|
| ST33TPHF2E mode TPM 2.0, TPM Firmware 0x49.0x14 & 0x49.0x15 | ANSSI-CC-2019/53 | Compare |
| ST33TPHF2E mode TPM 1.2, TPM Firmware 0x49.0x40 & 0x49.0x41 | ANSSI-CC-2019/44 | Compare |
| ST33TPHF2E mode TPM 1.2 TPM Firmware versions 73.08 (0x49 0x08) et 73.09 (0x49 0x09) | ANSSI-CC-2018/39 | Compare |
Cross-references
No references are available for this certificate.
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The certificate was first processed.
{
"_type": "sec_certs.sample.cc.CCCertificate",
"category": "Trusted Computing",
"cert_link": null,
"dgst": "b7d814ae0cc44391",
"heuristics": {
"_type": "sec_certs.sample.cc_eucc_common.Heuristics",
"annotated_references": null,
"cert_id": "ANSSI-CC-2019/52",
"cert_lab": null,
"cpe_matches": null,
"direct_transitive_cves": null,
"eal": "EAL4+",
"extracted_sars": {
"_type": "Set",
"elements": [
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_CMS",
"level": 4
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_TSS",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AVA_VAN",
"level": 4
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_FUN",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_DPT",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_SPD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_FLR",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_TAT",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_IND",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_FSP",
"level": 4
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_CCL",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_ECD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_REQ",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AGD_PRE",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_INT",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_ARC",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ATE_COV",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "AGD_OPE",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_CMC",
"level": 4
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_LCD",
"level": 1
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_TDS",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ADV_IMP",
"level": 3
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ASE_OBJ",
"level": 2
},
{
"_type": "sec_certs.sample.sar.SAR",
"family": "ALC_DEL",
"level": 1
}
]
},
"extracted_versions": {
"_type": "Set",
"elements": [
"49.0",
"1.2"
]
},
"indirect_transitive_cves": null,
"next_certificates": null,
"prev_certificates": null,
"protection_profiles": {
"_type": "Set",
"elements": [
"1b09df9f54d1b18b"
]
},
"related_cves": null,
"report_references": {
"_type": "sec_certs.sample.certificate.References",
"directly_referenced_by": null,
"directly_referencing": null,
"indirectly_referenced_by": null,
"indirectly_referencing": null
},
"scheme_data": null,
"st_references": {
"_type": "sec_certs.sample.certificate.References",
"directly_referenced_by": null,
"directly_referencing": null,
"indirectly_referenced_by": null,
"indirectly_referencing": null
},
"verified_cpe_matches": null
},
"maintenance_updates": {
"_type": "Set",
"elements": []
},
"manufacturer": "STMicroelectronics",
"manufacturer_web": "https://www.st.com/",
"name": "ST33TPHF2E mode TPM 1.2, TPM Firmware 0x49.0x14 \u0026 0x49.0x15",
"not_valid_after": "2024-11-06",
"not_valid_before": "2019-11-06",
"pdf_data": {
"_type": "sec_certs.sample.cc_eucc_common.PdfData",
"cert_filename": null,
"cert_frontpage": null,
"cert_keywords": null,
"cert_metadata": null,
"report_filename": "anssi-cc-2019_52fr.pdf",
"report_frontpage": {
"FR": {}
},
"report_keywords": {
"asymmetric_crypto": {},
"cc_cert_id": {},
"cc_claims": {
"A": {
"A.C": 1
}
},
"cc_protection_profile_id": {},
"cc_sar": {
"ADV": {
"ADV_ARC": 1,
"ADV_FSP": 1,
"ADV_IMP": 1,
"ADV_INT": 1,
"ADV_SPM": 1,
"ADV_TDS": 1
},
"AGD": {
"AGD_OPE": 1,
"AGD_PRE": 1
},
"ALC": {
"ALC_CMC": 1,
"ALC_CMS": 1,
"ALC_DEL": 1,
"ALC_DVS": 1,
"ALC_FLR": 1,
"ALC_LCD": 1,
"ALC_TAT": 1
},
"ASE": {
"ASE_CCL": 1,
"ASE_ECD": 1,
"ASE_INT": 1,
"ASE_OBJ": 1,
"ASE_REQ": 1,
"ASE_SPD": 1,
"ASE_TSS": 1
},
"ATE": {
"ATE_COV": 1,
"ATE_DPT": 1,
"ATE_FUN": 1,
"ATE_IND": 1
},
"AVA": {
"AVA_VAN": 2
}
},
"cc_security_level": {
"EAL": {
"EAL 1": 2,
"EAL 4": 1,
"EAL 4+": 1,
"EAL 6": 1
}
},
"cc_sfr": {},
"certification_process": {},
"cipher_mode": {
"CFB": {
"CFB": 1
},
"CTR": {
"CTR": 1
}
},
"cplc_data": {},
"crypto_engine": {},
"crypto_library": {
"Neslib": {
"NesLib 5.1.0": 1
}
},
"crypto_protocol": {},
"crypto_scheme": {},
"device_model": {},
"ecc_curve": {},
"eval_facility": {
"Serma": {
"SERMA": 2
}
},
"hash_function": {
"SHA": {
"SHA1": {
"SHA-1": 1
},
"SHA2": {
"SHA-256": 1
}
}
},
"ic_data_group": {},
"javacard_api_const": {},
"javacard_packages": {},
"javacard_version": {},
"os_name": {},
"pq_crypto": {},
"randomness": {
"TRNG": {
"TRNG": 1
}
},
"side_channel_analysis": {},
"standard_id": {
"BSI": {
"AIS 31": 1
}
},
"symmetric_crypto": {
"AES_competition": {
"AES": {
"AES": 3
}
},
"DES": {
"DES": {
"DES": 3
}
},
"constructions": {
"MAC": {
"HMAC": 1
}
}
},
"technical_report_id": {},
"tee_name": {
"IBM": {
"SE": 14
}
},
"tls_cipher_suite": {},
"vendor": {
"STMicroelectronics": {
"STM": 9
}
},
"vulnerability": {}
},
"report_metadata": {
"/Author": "chuzel",
"/CreationDate": "D:20191107112204+01\u002700\u0027",
"/Creator": "PScript5.dll Version 5.2.2",
"/ModDate": "D:20191107112204+01\u002700\u0027",
"/Producer": "Acrobat Distiller 11.0 (Windows)",
"/Title": "Microsoft Word - ANSSI-CC-2019_52fr.docx",
"pdf_file_size_bytes": 393103,
"pdf_hyperlinks": {
"_type": "Set",
"elements": []
},
"pdf_is_encrypted": false,
"pdf_number_of_pages": 17
},
"st_filename": "anssi-cible-cc-2019_52en.pdf",
"st_frontpage": null,
"st_keywords": {
"asymmetric_crypto": {
"RSA": {
"RSA 512": 5,
"RSA-2048": 1
}
},
"cc_cert_id": {},
"cc_claims": {
"A": {
"A.C": 1
}
},
"cc_protection_profile_id": {
"BSI": {
"BSI-PP-0030-2008-MA-02": 1
}
},
"cc_sar": {
"ADV": {
"ADV_ARC.1": 1,
"ADV_FSP.4": 1,
"ADV_IMP.3": 1,
"ADV_TDS.3": 1
},
"AGD": {
"AGD_OPE.1": 1,
"AGD_PRE.1": 1
},
"ALC": {
"ALC_CMC.4": 1,
"ALC_CMS.4": 1,
"ALC_DEL.1": 1,
"ALC_DVS": 1,
"ALC_FLR.1": 3,
"ALC_LCD.1": 1,
"ALC_TAT.1": 1
},
"ASE": {
"ASE_CCL.1": 1,
"ASE_ECD.1": 1,
"ASE_INT.1": 1,
"ASE_OBJ.2": 1,
"ASE_REQ.2": 1,
"ASE_SPD.1": 1,
"ASE_TSS.1": 1
},
"ATE": {
"ATE_COV.2": 1,
"ATE_DPT.1": 1,
"ATE_FUN.1": 1,
"ATE_IND.2": 1
},
"AVA": {
"AVA_VAN.4": 3
}
},
"cc_security_level": {
"EAL": {
"EAL4": 2,
"EAL4 augmented": 1
}
},
"cc_sfr": {
"FAU": {
"FAU_GEN.1": 3
},
"FCO": {
"FCO_NRO": 4,
"FCO_NRO.1": 1
},
"FCS": {
"FCS_CKM": 4,
"FCS_CKM.1": 10,
"FCS_CKM.1.1": 1,
"FCS_CKM.2": 2,
"FCS_CKM.4": 12,
"FCS_CKM.4.1": 1,
"FCS_COP": 14,
"FCS_COP.1": 6,
"FCS_COP.1.1": 3,
"FCS_RNG": 3,
"FCS_RNG.1": 9,
"FCS_RNG.1.1": 2,
"FCS_RNG.1.2": 2
},
"FDP": {
"FDP_ACC": 25,
"FDP_ACC.1": 16,
"FDP_ACC.1.1": 1,
"FDP_ACF": 24,
"FDP_ACF.1": 18,
"FDP_ACF.1.1": 6,
"FDP_ACF.1.2": 6,
"FDP_ACF.1.3": 6,
"FDP_ACF.1.4": 6,
"FDP_ETC.2": 3,
"FDP_IFC.1": 3,
"FDP_ITC.1": 5,
"FDP_ITC.2": 10,
"FDP_RIP.1": 2,
"FDP_TDC.1": 1,
"FDP_UCT": 4,
"FDP_UCT.1": 1,
"FDP_UIT": 10,
"FDP_UIT.1": 1,
"FDP_UIT.1.1": 1,
"FDP_UIT.1.2": 1
},
"FIA": {
"FIA_AFL.1": 4,
"FIA_AFL.1.1": 1,
"FIA_AFL.1.2": 1,
"FIA_UAU.1": 5,
"FIA_UAU.1.1": 1,
"FIA_UAU.1.2": 1,
"FIA_UAU.4": 3,
"FIA_UAU.5": 5,
"FIA_UAU.5.1": 1,
"FIA_UAU.5.2": 1,
"FIA_UAU.6": 3,
"FIA_UID.1": 5,
"FIA_UID.1.1": 1,
"FIA_UID.1.2": 1,
"FIA_USB.1": 3
},
"FMT": {
"FMT_MSA": 44,
"FMT_MSA.1": 10,
"FMT_MSA.1.1": 1,
"FMT_MSA.2": 4,
"FMT_MSA.2.1": 1,
"FMT_MSA.3": 17,
"FMT_MSA.3.1": 4,
"FMT_MSA.3.2": 4,
"FMT_MTD": 8,
"FMT_MTD.1": 1,
"FMT_SMF.1": 4,
"FMT_SMF.1.1": 1,
"FMT_SMR.1": 14
},
"FPR": {
"FPR_UNL.1": 2
},
"FPT": {
"FPT_FLS.1": 3,
"FPT_FLS.1.1": 1,
"FPT_PHP.3": 2,
"FPT_PHP.3.1": 1,
"FPT_STM.1": 3,
"FPT_TDC.1": 3,
"FPT_TDC.1.1": 1,
"FPT_TDC.1.2": 1,
"FPT_TST.1": 2
},
"FTP": {
"FTP_ITC.1": 2,
"FTP_TRP.1": 2
}
},
"certification_process": {},
"cipher_mode": {
"CFB": {
"CFB": 2
},
"CTR": {
"CTR": 2
}
},
"cplc_data": {},
"crypto_engine": {
"NesCrypt": {
"NESCRYPT": 1
}
},
"crypto_library": {
"Neslib": {
"NesLib 5.1.0": 1
}
},
"crypto_protocol": {},
"crypto_scheme": {
"MAC": {
"MAC": 3
}
},
"device_model": {},
"ecc_curve": {},
"eval_facility": {},
"hash_function": {
"SHA": {
"SHA1": {
"SHA-1": 25
},
"SHA2": {
"SHA-256": 1
}
}
},
"ic_data_group": {},
"javacard_api_const": {},
"javacard_packages": {},
"javacard_version": {},
"os_name": {},
"pq_crypto": {},
"randomness": {
"RNG": {
"RNG": 17
},
"TRNG": {
"TRNG": 4
}
},
"side_channel_analysis": {
"SCA": {
"DPA": 1,
"SPA": 1,
"physical probing": 2,
"side channel": 1,
"timing attacks": 1
}
},
"standard_id": {
"BSI": {
"AIS 20": 2,
"AIS 31": 1,
"AIS20": 3
},
"CC": {
"CCMB-2012-09-001": 1,
"CCMB-2012-09-002": 2,
"CCMB-2012-09-003": 3,
"CCMB-2012-09-04": 1
},
"FIPS": {
"FIPS 140-2": 2,
"FIPS 180-2": 3,
"FIPS 197": 2,
"FIPS 46-3": 1,
"FIPS PUB 180-2": 2,
"FIPS PUB 197": 2
},
"NIST": {
"SP 800-17": 1,
"SP 800-38A": 2,
"SP 800-90A": 1
},
"PKCS": {
"PKCS#1": 8
},
"RFC": {
"RFC2104": 4
}
},
"symmetric_crypto": {
"AES_competition": {
"AES": {
"AES": 11
}
},
"DES": {
"3DES": {
"3DES": 1
},
"DES": {
"DES": 3
}
},
"constructions": {
"MAC": {
"HMAC": 7
}
}
},
"technical_report_id": {},
"tee_name": {},
"tls_cipher_suite": {},
"vendor": {
"STMicroelectronics": {
"STMicroelectronics": 11
}
},
"vulnerability": {}
},
"st_metadata": {
"/Author": "olivier collart",
"/CreationDate": "D:20191025012835+02\u002700\u0027",
"/Creator": "PDFCreator 2.4.1.13",
"/Keywords": "",
"/ModDate": "D:20191025012835+02\u002700\u0027",
"/Producer": "PDFCreator 2.4.1.13",
"/Subject": "",
"/Title": "ST33TPHF2E_M12_FW49145_ST (02.01p)",
"pdf_file_size_bytes": 637125,
"pdf_hyperlinks": {
"_type": "Set",
"elements": []
},
"pdf_is_encrypted": false,
"pdf_number_of_pages": 56
}
},
"protection_profile_links": {
"_type": "Set",
"elements": [
"https://www.commoncriteriaportal.org/nfs/ccpfiles/files/ppfiles/pp0030b.pdf"
]
},
"report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cc-2019_52fr.pdf",
"scheme": "FR",
"security_level": {
"_type": "Set",
"elements": [
"EAL4+",
"AVA_VAN.4",
"ALC_FLR.1"
]
},
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