MIFARE® Plus® EV2 on ST31R480 A01 (version 1.0.3) (ANSSI-CC-2025/33)

CSV information

Status active
Valid from 29.09.2025
Valid until 29.10.2030
Scheme 🇫🇷 FR
Manufacturer STMicroelectronics
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level ALC_DVS.2, ADV_FSP.6, AVA_VAN.5, ALC_FLR.2, EAL5+, ASE_TSS.2
Protection profiles

Heuristics summary

Certificate ID: ANSSI-CC-2025/33

Certificate

Extracted keywords

Security level
EAL5, EAL2
Security Assurance Requirements (SAR)
ALC_DVS.2, ALC_FLR.2, AVA_VAN.5, ASE_TSS.2
Protection profiles
BSI-CC-PP-0084-2014
Certificates
ANSSI-CC-2025/33

File metadata

Creation date D:20250929102033+02'00'
Modification date D:20250929062733-07'00'
Pages 2
Creator Acrobat PDFMaker 25 pour Word
Producer PDFKit.NET 12.3.563.0 DMV10

Certification report

Extracted keywords

Symmetric Algorithms
DES

Security level
EAL5, EAL2, EAL7, ITSEC E6 Elevé
Security Assurance Requirements (SAR)
ALC_DVS.2, ALC_FLR.2, ALC_FLR, AVA_VAN.5, AVA_VAN, ASE_TSS.2
Protection profiles
BSI-CC-PP-0084-2014, BSI-PP-0084-2014
Certificates
ANSSI-CC-2025/33, ANSSI-CC-2025/07
Evaluation facilities
CESTI

Standards
ISO/IEC 15408-, ISO/IEC 18045:2022, CCMB-2022-11-001

File metadata

Creation date D:20250929102159+02'00'
Modification date D:20250929062734-07'00'
Pages 14
Creator Acrobat PDFMaker 25 pour Word
Producer PDFKit.NET 12.3.563.0 DMV10

References

Outgoing

Security target

Extracted keywords

Symmetric Algorithms
AES, DES, TDES, TDEA, CMAC
Schemes
MAC
Randomness
TRNG, RND, RNG
Block cipher modes
CBC

Vendor
NXP, STMicroelectronics

Security level
EAL5, EAL6, EAL4, EAL5 augmented, EAL6 augmented
Claims
O.RND, O.MAC, T.RND
Security Assurance Requirements (SAR)
ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, ADV_COMP.1, ADV_ARC, ADV_FSP, ADV_IMP, AGD_OPE.1, AGD_PRE.1, AGD_OPE, ALC_DVS.2, ALC_FLR.2, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_LCD.1, ALC_TAT.2, ALC_COMP.1, ALC_DVS, ALC_CMS, ALC_CMC, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, ATE_COMP.1, ATE_COV, AVA_VAN.5, AVA_COMP.1, AVA_VAN, ASE_INT, ASE_CCL, ASE_ECD, ASE_SPD, ASE_OBJ, ASE_REQ, ASE_TSS, ASE_TSS.2, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_COMP.1, ASE_REQ.1
Security Functional Requirements (SFR)
FAU_SAS.1, FAU_SAS, FAU_SAR.1, FAU_GEN.1, FCS_RNG.1, FCS_COP.1, FCS_CKM.1, FCS_CKM.6, FCS_CKM.4, FCS_CKM.6.1, FCS_CKM.6.2, FCS_CKM.5, FCS_CKM.2, FCS_RBG.1, FDP_ACC.1, FDP_ACF.1, FDP_ITC.2, FDP_RIP.1, FDP_SDC.1, FDP_SDI.2, FDP_ITT.1, FDP_IFC.1, FDP_UCT.1, FDP_UIT.1, FDP_ITC.1, FDP_ACC.2, FDP_SMF.1, FDP_SMR.1, FDP_COP.1, FIA_UID.2, FIA_UAU.2, FIA_UAU.3, FIA_UAU.5, FIA_API.1, FIA_UID.1, FIA_UAU.1, FMT_SMR.1, FMT_MSA.3, FMT_MSA.1, FMT_SMF.1, FMT_MTD.1, FMT_LIM.1, FMT_LIM.2, FPR_UNL.1, FPT_TDC.1, FPT_RPL.1, FPT_FLS.1, FPT_PHP.3, FPT_ITT.1, FRU_RSA.2, FRU_FLT.2, FTP_TRP.1, FTP_ITC.1, FTP_TRP.1.3
Protection profiles
BSI-CC-PP-0084-2014, BSI-CC-PP- 0084-2014, BSI-CC-PP-0084-

Side-channel analysis
Leak-Inherent, Physical Probing, side-channel, Malfunction, malfunction, JIL
Certification process
out of scope, Target for composition 12/82 SMD_MFPEV2_ST31R480_ST_24_002 Virtual Card Architecture are also out of scope. Personalization and Originality Check are in scope. • Security level 1 (SL1): Different, Level. Proximity Check, Virtual Card Architecture, data access of sectors in SL3 or SL1SL3Mix, are out of scope. • Security level 3 (SL3): The card user can access the data and value blocks in the TOE after an

Standards
FIPS 197, NIST SP 800-38A, NIST SP 800-38B, NIST SP 800-67, SP 800-67, CCMB-2022-11-002, CCMB-2022-11-003, CCMB-2022-11-005, CCMB-2017-04-002, CCMB-2022-11-001

File metadata

Title SMD_MFPEV2_ST31R480_V01_1P.pdf
Author feixbeno
Creation date D:20250710172842Z
Modification date D:20250710173024+02'00'
Pages 82
Creator FrameMaker 17.0.1
Producer Adobe PDF Library 17.0

Heuristics

Certificate ID: ANSSI-CC-2025/33

Extracted SARs

ADV_ARC.1, ADV_COMP.1, ADV_FSP.6, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, AGD_OPE.1, AGD_PRE.1, ALC_CMC.4, ALC_CMS.5, ALC_COMP.1, ALC_DEL.1, ALC_DVS.2, ALC_FLR.2, ALC_LCD.1, ALC_TAT.2, ASE_CCL.1, ASE_COMP.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.2, ATE_COMP.1, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, AVA_COMP.1, AVA_VAN.5

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References

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Updates

  • 20.10.2025 The certificate was first processed.
    New certificate

    A new Common Criteria certificate with the product name MIFARE® Plus® EV2 on ST31R480 A01 (version 1.0.3) (ANSSI-CC-2025/33) was processed.

Raw data

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/Certificat-ANSSI-CC-2025_33fr.pdf",
  "dgst": "9a509e920ff67dfb",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2025/33",
    "cert_lab": null,
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL5+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_COMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_COMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMC",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_COMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_OPE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DEL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VAN",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_INT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMS",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_FLR",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 6
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_TDS",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_PRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_COMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_ARC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "1.0.3"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": {
      "_type": "Set",
      "elements": [
        "cf0f01bcd7be3e9c"
      ]
    },
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2025/07"
        ]
      },
      "indirectly_referenced_by": null,
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2025/07"
        ]
      }
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": []
  },
  "manufacturer": "STMicroelectronics",
  "manufacturer_web": "https://www.st.com/",
  "name": "MIFARE\u00ae Plus\u00ae EV2 on ST31R480 A01 (version 1.0.3) (ANSSI-CC-2025/33)",
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          "EAL7": 1
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        "ITSEC": {
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          "mailto:[email protected]",
          "http://www.cyber.gouv.fr/"
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          "ASE_OBJ": 13,
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          "ATE_COV": 1,
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          "EAL5": 19,
          "EAL5 augmented": 3,
          "EAL6": 2,
          "EAL6 augmented": 2
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          "FAU_SAS.1": 14
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          "FCS_CKM.2": 1,
          "FCS_CKM.4": 3,
          "FCS_CKM.5": 3,
          "FCS_CKM.6": 18,
          "FCS_CKM.6.1": 3,
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          "FCS_COP.1": 24,
          "FCS_RBG.1": 1,
          "FCS_RNG.1": 23
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        "FDP": {
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          "FDP_ACC.2": 3,
          "FDP_ACF.1": 29,
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          "FDP_IFC.1": 18,
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          "FDP_ITC.2": 13,
          "FDP_ITT.1": 9,
          "FDP_RIP.1": 9,
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          "FDP_SDI.2": 10,
          "FDP_SMF.1": 2,
          "FDP_SMR.1": 1,
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          "FDP_UIT.1": 8
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          "FIA_UAU.1": 8,
          "FIA_UAU.2": 9,
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          "FIA_UAU.5": 8,
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          "FMT_MSA.1": 25,
          "FMT_MSA.3": 28,
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