NXP JCOP 3 SECID P40 ChipDoc-Lite in SSCD Configuration (version 1.0.10)

CSV information

Status archived
Valid from 12.03.2018
Valid until 12.03.2023
Scheme 🇫🇷 FR
Manufacturer NXP Semiconductors
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level EAL5+, ALC_DVS.2, AVA_VAN.5
Protection profiles

Heuristics summary

Certificate ID: ANSSI-CC-2018/07

Certificate

certificate could not be downloaded, no link is available.

Certification report

Certification report PDF TXT

Extracted keywords

Symmetric Algorithms
DES

Operating System name
JCOP 3
Vendor
NXP, NXP Semiconductors

Security level
EAL5, EAL2, EAL7, EAL 1, EAL 3, EAL 5, EAL 7, ITSEC E6 Elevé
Security Assurance Requirements (SAR)
ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_PRE, AGD_OPE, ALC_DVS.2, ALC_FLR, ALC_CMC, ALC_CMS, ALC_DEL, ALC_DVS, ALC_TAT, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VAN.5, AVA_VAN, ASE_TSS.2, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_REQ, ASE_SPD, ASE_TSS
Protection profiles
BSI-CC-PP-0075-2012, BSI-PP-0084-2014, PP-SSCD-Part2, PP-SSCD-Part3, PP-SSCD-
Certificates
ANSSI-CC-2018/07, NSCIB-CC-65655-CR2, NSCIB-CC-65156-CR2
Evaluation facilities
Serma Safety & Security, SERMA

Standards
CCMB-2012-09-001, CCMB-2012-09-002, CCMB-2012-09-003, CCMB-2012-09-004

File metadata

Keywords ANSSI-CC-CER-F-07.026
Creation date D:20180314154523+01'00'
Modification date D:20180314174237+01'00'
Pages 16
Creator Acrobat PDFMaker 11 pour Word
Producer Adobe PDF Library 11.0

Frontpage

Certificate ID ANSSI-CC-2018/07
Certified item NXP JCOP 3 SECID P40 ChipDoc-Lite in SSCD Configuration
Certification lab Serma Safety & Security 14 rue Galilée, CS 10055, 33615 Pessac Cedex, France
Developer NXP Semiconductors GmbH Troplowitzstr. 20, 22529 Hamburg, Allemagne Commanditaire NXP Semiconductors GmbH Troplowitzstr. 20, 22529 Hamburg, Allemagne

References

Outgoing
  • NSCIB-CC-65655-CR2 - archived - NXP Secure Smart Card Controller P40C008/012/024/040/072 VE.001
  • NSCIB-CC-65156-CR2 - archived - Firmware Libraries V2.x on P40C008/012/024/040/072 VE.001

Security target

Security target PDF TXT

Extracted keywords

Symmetric Algorithms
DES, TDES, 3DES
Asymmetric Algorithms
RSA 1024, Diffie-Hellman
Hash functions
SHA-1, SHA-256, SHA-224
Schemes
MAC
Randomness
DRBG, RNG
Block cipher modes
CBC

Operating System name
JCOP 3
Vendor
NXP Semiconductors N.V, NXP, NXP Semiconductors

Security level
EAL 4+, EAL 5+, EAL 4, EAL4, EAL4+, EAL 4 augmented, EAL4 augmented
Claims
A.CGA, A.SCA, A.CSP, A.SCP, OE.HID_VAD
Security Assurance Requirements (SAR)
ADV_ARC.1, ADV_FSP.4, ADV_IMP.1, ADV_TDS.3, ADV_ARC, AGD_OPE.1, AGD_PRE.1, ALC_DVS.2, ALC_DVS, ALC_CMC.4, ALC_CMS.4, ALC_DEL.1, ALC_LCD.1, ALC_TAT.1, ATE_COV.2, ATE_DPT.2, ATE_FUN.1, ATE_IND.2, ATE_DPT.1, AVA_VAN.5, AVA_VAN, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_GEN, FCS_CKM.1, FCS_CKM.1.1, FCS_CKM.4, FCS_CKM.4.1, FCS_COP.1, FCS_COP.1.1, FCS_COP, FDP_ACC.1, FDP_ACC, FDP_ACF.1, FDP_ITC.1, FDP_UCT.1, FDP_RIP.1, FDP_RIP.1.1, FDP_SDI.2, FDP_UCT, FDP_ACF, FDP_ITC, FDP_SDI, FIA_AFL.1, FIA_AFL.1.1, FIA_AFL.1.2, FIA_UAU.1, FIA_UAU.1.1, FIA_UID.1, FIA_UAU.1.2, FIA_UID.1.1, FIA_UID.1.2, FMT_MOF.1, FMT_MOF, FMT_MSA.1, FMT_MSA.2, FMT_MSA.2.1, FMT_MSA.3, FMT_MSA.3.1, FMT_MSA.3.2, FMT_MSA.4, FMT_MSA.4.1, FMT_MTD.1, FMT_MTD, FMT_SMF.1, FMT_SMF.1.1, FMT_SMR.1, FMT_SMR.1.1, FMT_SMR.1.2, FMT_MSA, FPT_EMS.1, FPT_EMS, FPT_EMS.1.1, FPT_EMS.1.2, FPT_TST.1, FPT_FLS.1, FPT_FLS.1.1, FPT_TST, FPT_PHP.1, FPT_PHP.1.1, FPT_PHP.1.2, FPT_PHP.3, FPT_PHP.3.1, FPT_TST.1.1, FPT_TST.1.2, FPT_TST.1.3, FPT_ITC.1, FTP_ITC, FTP_ITC.1
Protection profiles
BSI-CC-PP-0059-2009-MA-01, BSI-CC-PP-0075, BSI-PP-0035, BSI-CC-PP0075-2012–, BSI-CC-PP0059-2009-MA-01–, BSI-PP-0035-2007
Certificates
NSCIB-CC-15-65156, NSCIB-15-65655-CR
Evaluation facilities
BrightSight, Brightsight

Side-channel analysis
SPA, DPA, timing attacks, physical tampering, malfunction, DFA, fault injection

Standards
FIPS PUB 46-3, FIPS PUB 180-2, PKCS#1, ISO/IEC 7816
Technical reports
BSI 2006

File metadata

Creation date D:20180202125246Z
Modification date D:20180314174256+01'00'
Pages 60
Creator Microsoft® Word 2016
Producer Microsoft® Word 2016

Heuristics

Automated inference - use with caution

All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. For details on our data sources and inference methods, see our methodology. If you believe any information here is inaccurate or harmful, please submit feedback.

Certificate ID

ANSSI-CC-2018/07

Extracted SARs

ADV_ARC.1, ADV_FSP.4, ADV_IMP.1, ADV_TDS.3, AGD_OPE.1, AGD_PRE.1, ALC_CMC.4, ALC_CMS.4, ALC_DEL.1, ALC_DVS.2, ALC_LCD.1, ALC_TAT.1, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.2, ATE_FUN.1, ATE_IND.2, AVA_VAN.5

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Showing 5 out of 14.

References

Updates

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  • The certificate data changed.
  • The certificate was first processed.

Raw data 

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": null,
  "dgst": "7c742cbf21424f57",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2018/07",
    "cert_lab": [
      "SERMA"
    ],
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL5+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DEL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_TDS",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMC",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_ARC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VAN",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_OPE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_PRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMS",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 2
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "1.0.10"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": {
      "_type": "Set",
      "elements": [
        "27abdb9c6ab375a7",
        "d918b28fd7bb5d79"
      ]
    },
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "NSCIB-CC-65655-CR2",
          "NSCIB-CC-65156-CR2"
        ]
      },
      "indirectly_referenced_by": null,
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "NSCIB-CC-65655-CR2",
          "NSCIB-CC-65156-CR2"
        ]
      }
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": []
  },
  "manufacturer": "NXP Semiconductors",
  "manufacturer_web": "https://www.nxp.com/",
  "name": "NXP JCOP 3 SECID P40 ChipDoc-Lite in SSCD Configuration (version 1.0.10)",
  "not_valid_after": "2023-03-12",
  "not_valid_before": "2018-03-12",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "anssi-cc-2018-07fr.pdf",
    "report_frontpage": {
      "FR": {
        "cc_security_level": "EAL5 augment\u00e9 ALC_DVS.2, AVA_VAN.5",
        "cc_version": "Crit\u00e8res Communs version 3.1 r\u00e9vision 4",
        "cert_id": "ANSSI-CC-2018/07",
        "cert_item": "NXP JCOP 3 SECID P40 ChipDoc-Lite in SSCD Configuration",
        "cert_item_version": "Version 1.0.10",
        "cert_lab": "Serma Safety \u0026 Security 14 rue Galil\u00e9e, CS 10055, 33615 Pessac Cedex, France",
        "developer": "NXP Semiconductors GmbH Troplowitzstr. 20, 22529 Hamburg, Allemagne Commanditaire NXP Semiconductors GmbH Troplowitzstr. 20, 22529 Hamburg, Allemagne",
        "match_rules": [
          "R\u00e9f\u00e9rence du rapport de certification(.+)Nom du produit(.+)R\u00e9f\u00e9rence/version du produit(.+)Conformit\u00e9 \u00e0 un profil de protection(.+)Crit\u00e8res d\u2019\u00e9valuation et version(.+)Niveau d\u2019\u00e9valuation(.+)D\u00e9veloppeur (.+)Centre d\u2019\u00e9valuation(.+)Accords de reconnaissance applicables"
        ],
        "ref_protection_profiles": "PP-SSCD-Part2] Protection profiles for secure signature creation device - Device with key generation, v2.0.1 ; [PP-SSCD-Part3] Protection profiles for secure signature creation device - Device with key import, v1.0.2"
      }
    },
    "report_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {
        "FR": {
          "ANSSI-CC-2018/07": 17
        },
        "NL": {
          "NSCIB-CC-65156-CR2": 1,
          "NSCIB-CC-65655-CR2": 1
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-CC-PP-0075-2012": 1,
          "BSI-PP-0084-2014": 1
        },
        "other": {
          "PP-SSCD-": 3,
          "PP-SSCD-Part2": 2,
          "PP-SSCD-Part3": 1
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC": 1,
          "ADV_FSP": 1,
          "ADV_IMP": 1,
          "ADV_INT": 1,
          "ADV_SPM": 1,
          "ADV_TDS": 1
        },
        "AGD": {
          "AGD_OPE": 2,
          "AGD_PRE": 3
        },
        "ALC": {
          "ALC_CMC": 1,
          "ALC_CMS": 1,
          "ALC_DEL": 1,
          "ALC_DVS": 1,
          "ALC_DVS.2": 4,
          "ALC_FLR": 2,
          "ALC_TAT": 1
        },
        "ASE": {
          "ASE_CCL": 1,
          "ASE_ECD": 1,
          "ASE_INT": 1,
          "ASE_OBJ": 1,
          "ASE_REQ": 1,
          "ASE_SPD": 1,
          "ASE_TSS": 1,
          "ASE_TSS.2": 2
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_DPT": 1,
          "ATE_FUN": 1,
          "ATE_IND": 1
        },
        "AVA": {
          "AVA_VAN": 2,
          "AVA_VAN.5": 6
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL 1": 1,
          "EAL 3": 1,
          "EAL 5": 1,
          "EAL 7": 1,
          "EAL2": 2,
          "EAL5": 4,
          "EAL7": 1
        },
        "ITSEC": {
          "ITSEC E6 Elev\u00e9": 1
        }
      },
      "cc_sfr": {},
      "certification_process": {},
      "cipher_mode": {},
      "cplc_data": {},
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {},
      "crypto_scheme": {},
      "device_model": {},
      "ecc_curve": {},
      "eval_facility": {
        "Serma": {
          "SERMA": 1,
          "Serma Safety \u0026 Security": 1
        }
      },
      "hash_function": {},
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {
        "JCOP": {
          "JCOP 3": 19
        }
      },
      "pq_crypto": {},
      "randomness": {},
      "side_channel_analysis": {},
      "standard_id": {
        "CC": {
          "CCMB-2012-09-001": 1,
          "CCMB-2012-09-002": 1,
          "CCMB-2012-09-003": 1,
          "CCMB-2012-09-004": 1
        }
      },
      "symmetric_crypto": {
        "DES": {
          "DES": {
            "DES": 1
          }
        }
      },
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {
        "NXP": {
          "NXP": 23,
          "NXP Semiconductors": 4
        }
      },
      "vulnerability": {}
    },
    "report_metadata": {
      "/Category": "R\u00e9f\u00e9rence, Version",
      "/Comments": "NXP Semiconductors GmbH",
      "/Company": "SGDSN/ANSSI",
      "/CreationDate": "D:20180314154523+01\u002700\u0027",
      "/Creator": "Acrobat PDFMaker 11 pour Word",
      "/Keywords": "ANSSI-CC-CER-F-07.026",
      "/ModDate": "D:20180314174237+01\u002700\u0027",
      "/Producer": "Adobe PDF Library 11.0",
      "/SourceModified": "D:20180314144518",
      "/Subject": "",
      "/Title": "",
      "pdf_file_size_bytes": 265654,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": [
          "http://www.ssi.gouv.fr/",
          "mailto:[email protected]"
        ]
      },
      "pdf_is_encrypted": false,
      "pdf_number_of_pages": 16
    },
    "st_filename": "anssi-cible-2018_07en.pdf",
    "st_frontpage": null,
    "st_keywords": {
      "asymmetric_crypto": {
        "FF": {
          "DH": {
            "Diffie-Hellman": 1
          }
        },
        "RSA": {
          "RSA 1024": 1
        }
      },
      "cc_cert_id": {
        "NL": {
          "NSCIB-15-65655-CR": 1,
          "NSCIB-CC-15-65156": 2
        }
      },
      "cc_claims": {
        "A": {
          "A.CGA": 5,
          "A.CSP": 4,
          "A.SCA": 5,
          "A.SCP": 1
        },
        "OE": {
          "OE.HID_VAD": 6
        }
      },
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-CC-PP-0059-2009-MA-01": 3,
          "BSI-CC-PP-0075": 3,
          "BSI-CC-PP0059-2009-MA-01\u2013": 1,
          "BSI-CC-PP0075-2012\u2013": 2,
          "BSI-PP-0035": 1,
          "BSI-PP-0035-2007": 1
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC": 1,
          "ADV_ARC.1": 2,
          "ADV_FSP.4": 2,
          "ADV_IMP.1": 2,
          "ADV_TDS.3": 2
        },
        "AGD": {
          "AGD_OPE.1": 2,
          "AGD_PRE.1": 2
        },
        "ALC": {
          "ALC_CMC.4": 1,
          "ALC_CMS.4": 1,
          "ALC_DEL.1": 1,
          "ALC_DVS": 1,
          "ALC_DVS.2": 5,
          "ALC_LCD.1": 1,
          "ALC_TAT.1": 1
        },
        "ASE": {
          "ASE_CCL.1": 1,
          "ASE_ECD.1": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ.2": 1,
          "ASE_REQ.2": 1,
          "ASE_SPD.1": 1,
          "ASE_TSS.1": 1
        },
        "ATE": {
          "ATE_COV.2": 1,
          "ATE_DPT.1": 1,
          "ATE_DPT.2": 1,
          "ATE_FUN.1": 1,
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