S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 2

CSV information

Status archived
Valid from 04.11.2009
Valid until 01.09.2019
Scheme 🇩🇪 DE
Manufacturer Samsung Electronics Co., Ltd.
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level EAL5+
Maintenance updates S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 7 (03.03.2010) Certification report Security target
S3CC9PW 16-bit RISC Microcontroller for Smart Card, Revision 0 (05.01.2010) Certification report Security target

Heuristics summary

Certificate ID: BSI-DSZ-CC-0547-2009

Certificate

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Certification report

Certification report PDF TXT

Extracted keywords

Symmetric Algorithms
AES, DES, Triple-DES
Randomness
TRNG, RNG
Engines
TORNADO
Block cipher modes
ECB, CBC

CPLC
IC Fabricator, IC Version
Vendor
Samsung

Security level
EAL 5, EAL 4, EAL 1, EAL 7, EAL4, EAL5+, EAL1, EAL3, EAL5, EAL7, EAL2, EAL6, EAL 5 augmented
Security Assurance Requirements (SAR)
ADV_ARC.1, ADV_FSP.1, ADV_FSP.2, ADV_FSP.3, ADV_FSP.4, ADV_FSP.5, ADV_FSP.6, ADV_IMP.1, ADV_IMP.2, ADV_INT.1, ADV_INT.2, ADV_INT.3, ADV_SPM.1, ADV_TDS.1, ADV_TDS.2, ADV_TDS.3, ADV_TDS.4, ADV_TDS.5, ADV_TDS.6, ADV_ARC, ADV_FSP, ADV_IMP, ADV_INT, ADV_SPM, ADV_TDS, AGD_OPE.1, AGD_PRE.1, AGD_OPE, AGD_PRE, ALC_DVS.2, ALC_CMC, ALC_CMC.1, ALC_CMC.2, ALC_CMC.3, ALC_CMC.4, ALC_CMC.5, ALC_CMS.1, ALC_CMS.2, ALC_CMS.3, ALC_CMS.4, ALC_CMS.5, ALC_DEL.1, ALC_DVS.1, ALC_FLR.1, ALC_FLR.2, ALC_FLR.3, ALC_LCD.1, ALC_LCD.2, ALC_TAT.1, ALC_TAT.2, ALC_TAT.3, ALC_CMS, ALC_DEL, ALC_DVS, ALC_FLR, ALC_TAT, ATE_COV.1, ATE_COV.2, ATE_COV.3, ATE_DPT.1, ATE_DPT.2, ATE_DPT.3, ATE_DPT.4, ATE_FUN.1, ATE_FUN.2, ATE_IND.1, ATE_IND.2, ATE_IND.3, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_VAN.5, AVA_VAN.1, AVA_VAN.2, AVA_VAN.3, AVA_VAN.4, AVA_VAN, APE_INT.1, APE_CCL.1, APE_SPD.1, APE_OBJ.1, APE_OBJ.2, APE_ECD.1, APE_REQ.1, APE_REQ.2, ASE_INT.1, ASE_CCL.1, ASE_SPD.1, ASE_OBJ.1, ASE_OBJ.2, ASE_ECD.1, ASE_REQ.1, ASE_REQ.2, ASE_TSS.1, ASE_TSS.2, ASE_CCL, ASE_ECD, ASE_INT, ASE_OBJ, ASE_SPD, ASE_TSS
Security Functional Requirements (SFR)
FCS_COP.1
Protection profiles
BSI-CC-PP-0035-2007, BSI-CC-PP-0035
Certificates
BSI-DSZ-CC-0547-2009
Evaluation facilities
TÜV Informationstechnik, TÜViT

Side-channel analysis
physical probing, side-channel, DPA, physical tampering, JIL
Certification process
Microcontroller for Smart Cards, Version 2.2 from 2009-04-22 Project Chippewa, Samsung Electronics (confidential document) [7] Security IC Platform Protection Profile, Version 1.0, 15.06.2007, registered and certified by, TECHNICAL REPORT-SUMMARY (ETR SUMMARY) for the product S3CC9PF, Version 1 from 2009-09-04, TÜViT (confidential document) [10] ETR FOR COMPOSITE EVALUATION (ETR-COMP) according to AIS 36 for the Product S3CC9PF, Version, from 2009-09-04, Version 1 from 2009-09-04, TÜViT (confidential document) 8 specifically • AIS 20, Version 1, 2. December 1999, Funktionalitätsklassen und, Definition (Class ALC_CMC.4/CMS.5) – Project Chippewa, Version 1.5, 2009-05-15,Samsung Electronics(confidential document) [12] User’s manual S3CC9PF Family (S3CC9PF/AF/PW) 16-Bit CMOS Microcontroller for Smart Card

Standards
AIS20, AIS31, AIS 34, AIS 20, AIS 25, AIS 26, AIS 35, AIS 36, AIS 31, AIS 32, AIS 38
Technical reports
BSI TR-02102, BSI 7125, BSI 7148, BSI 7149

File metadata

Title Certification Report BSI-DSZ-CC-0547-2009
Subject Common Criteria Certification
Keywords S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 2, Samsung Electronics Co., Ltd, Certification, Common Crtieria
Author Bundesamt für Sicherheit in der Informationstechnik
Creation date D:20091117115143+01'00'
Modification date D:20091118125353+01'00'
Pages 38
Creator Writer
Producer StarOffice 9

Frontpage

Certificate ID BSI-DSZ-CC-0547-2009
Certified item S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 2
Certification lab BSI
Developer Samsung Electronics Co., Ltd

References

Incoming
  • BSI-DSZ-CC-0639-2010 - archived - Samsung S3CT9KW 16-bit RISC Microcontroller for Smart Card, Revision 0 with optional secure RSA/ECC V1.0 Library including specific IC Dedicated Software

Security target

Security target PDF TXT

Extracted keywords

Symmetric Algorithms
AES, DES, T-DES, 3DES, Triple-DES
Randomness
TRNG, RND
Engines
TORNADO
Block cipher modes
ECB

Vendor
Samsung

Security level
EAL5, EAL 4, EAL 5, EAL5 augmented, EAL 4 augmented, EAL 5 augmented
Claims
O.RND, T.RND
Security Assurance Requirements (SAR)
ADV_ARC, ADV_FSP, ADV_IMP, ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_TDS.4, ADV_FSP.2, ADV_TDS.3, ADV_FSP.4, AGD_OPE, AGD_PRE, AGD_OPE.1, AGD_PRE.1, ALC_DVS.2, ALC_DEL, ALC_DVS, ALC_CMS, ALC_CMC, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_LCD.1, ALC_TAT.2, ALC_DVS.1, ALC_CMS.4, ATE_COV, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, AVA_VAN.5, AVA_VAN, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_SAS, FAU_GEN, FAU_SAS.1, FAU_SAS.1.1, FAU_GEN.1, FCS_RNG, FCS_RNG.1, FCS_RNG.1.1, FCS_RNG.1.2, FCS_COP.1, FCS_COP, FCS_CKM.1, FCS_CKM.4, FCS_CKM.1.1, FCS_CKM.2, FCS_CKM, FDP_ACF, FDP_ITT.1, FDP_ITT.1.1, FDP_ACC.1, FDP_IFC.1, FDP_IFC.1.1, FDP_IFF.1, FDP_ACF.1, FDP_ACC.1.1, FDP_ACF.1.1, FDP_ACF.1.2, FDP_ACF.1.3, FDP_ACF.1.4, FDP_ITC.1, FDP_ITC.2, FDP_SDI.1, FDP_ACC, FDP_IFC, FDP_ITT, FMT_LIM, FMT_LIM.1, FMT_LIM.2, FMT_LIM.1.1, FMT_LIM.2.1, FMT_MSA.3, FMT_MSA.1, FMT_MSA.3.1, FMT_MSA.3.2, FMT_SMR.1, FMT_MSA.1.1, FMT_SMF.1, FMT_SMF.1.1, FMT_MSA, FMT_SMF, FPT_FLS.1, FPT_FLS.1.1, FPT_PHP.3, FPT_PHP.3.1, FPT_PHP, FPT_ITT.1, FPT_ITT.1.1, FPT_FLS, FPT_ITT, FRU_FLT.2, FRU_FLT.1, FRU_FLT
Protection profiles
BSI-PP-0035

Side-channel analysis
Leak-Inherent, Physical Probing, physical probing, Physical probing, side-channel, SPA, DPA, timing attacks, physical tampering, Malfunction, malfunction, DFA, reverse engineering

Standards
FIPS 197, AIS20, AIS31, AIS 20, AIS 31

File metadata

Title Security Target Lite of S3CC9PF 16-bit RISC Microcontroller For Smart Cards
Subject S3CC9PF Common Criteria(version 3.1) EAL5+ Evaluation
Keywords Security Target of S3CC9PF 16-bit RISC Microcontroller For Smart Cards, CC EAL5+, Samsung Electroncis, SmartCard IC, Common Criteria version 3.1
Author KyungSuk YI (Bryant)
Creation date D:20090901195327+09'00'
Modification date D:20090904171734+09'00'
Pages 64
Creator PScript5.dll Version 5.2.2
Producer Acrobat Distiller 6.0.1 (Windows)

Heuristics

Automated inference - use with caution

All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. For details on our data sources and inference methods, see our methodology. If you believe any information here is inaccurate or harmful, please submit feedback.

Certificate ID

BSI-DSZ-CC-0547-2009

Extracted SARs

ADV_ARC.1, ADV_FSP.5, ADV_IMP.1, ADV_INT.2, ADV_SPM.1, ADV_TDS.4, AGD_OPE.1, AGD_PRE.1, ALC_CMC.4, ALC_CMS.5, ALC_DEL.1, ALC_DVS.2, ALC_FLR.3, ALC_LCD.1, ALC_TAT.2, APE_CCL.1, APE_ECD.1, APE_INT.1, APE_OBJ.2, APE_REQ.2, APE_SPD.1, ASE_CCL.1, ASE_ECD.1, ASE_INT.1, ASE_OBJ.2, ASE_REQ.2, ASE_SPD.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.3, ATE_FUN.1, ATE_IND.2, AVA_VAN.5

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Showing 5 out of 7.

References

Updates

  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate data changed.
  • The certificate was first processed.

Raw data 

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": null,
  "dgst": "37da977e92a14021",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "BSI-DSZ-CC-0547-2009",
    "cert_lab": [
      "BSI"
    ],
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL5+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_OBJ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VAN",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMC",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_PRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_ARC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_CCL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_FLR",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_OPE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_SPM",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_INT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_CMS",
          "level": 5
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "APE_REQ",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_TDS",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SPD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ECD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DEL",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "16",
        "2"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": null,
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "BSI-DSZ-CC-0639-2010"
        ]
      },
      "directly_referencing": null,
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "KECS-ISIS-0513-2014",
          "BSI-DSZ-CC-0719-2011",
          "ANSSI-CC-2012/70",
          "KECS-ISIS-0675-2015",
          "BSI-DSZ-CC-0895-2014",
          "ANSSI-CC-2012/72",
          "BSI-DSZ-CC-0802-2012",
          "KECS-ISIS-0490-2014",
          "BSI-DSZ-CC-0639-2010",
          "BSI-DSZ-CC-0894-2014",
          "KECS-ISIS-0468-2013",
          "KECS-ISIS-0394-2012",
          "BSI-DSZ-CC-0801-2012",
          "BSI-DSZ-CC-0720-2011",
          "KECS-ISIS-0456-2013",
          "BSI-DSZ-CC-0882-V2-2019",
          "KECS-ISIS-0435-2013",
          "BSI-DSZ-CC-0882-2013",
          "BSI-DSZ-CC-0719-V2-2016",
          "BSI-DSZ-CC-0720-V2-2016",
          "KECS-ISIS-0533-2014"
        ]
      },
      "indirectly_referencing": null
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": [
      {
        "_type": "sec_certs.sample.cc.CCCertificate.MaintenanceReport",
        "maintenance_date": "2010-03-03",
        "maintenance_report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0547_ma2a_pdf.pdf",
        "maintenance_st_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0547_ma2b_pdf.pdf",
        "maintenance_title": "S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 7"
      },
      {
        "_type": "sec_certs.sample.cc.CCCertificate.MaintenanceReport",
        "maintenance_date": "2010-01-05",
        "maintenance_report_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0547_ma1a_pdf.pdf",
        "maintenance_st_link": "https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0547_ma1b_pdf.pdf",
        "maintenance_title": "S3CC9PW 16-bit RISC Microcontroller for Smart Card, Revision 0"
      }
    ]
  },
  "manufacturer": "Samsung Electronics Co., Ltd.",
  "manufacturer_web": "https://www.samsung.com",
  "name": "S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 2",
  "not_valid_after": "2019-09-01",
  "not_valid_before": "2009-11-04",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "0547a_pdf.pdf",
    "report_frontpage": {
      "DE": {
        "cert_id": "BSI-DSZ-CC-0547-2009",
        "cert_item": "S3CC9PF 16-bit RISC Microcontroller for Smart Card, Revision 2",
        "cert_lab": "BSI",
        "developer": "Samsung Electronics Co., Ltd",
        "match_rules": [
          "(BSI-DSZ-CC-.+?) (?:for|For) (.+?) from (.*)"
        ]
      }
    },
    "report_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {
        "DE": {
          "BSI-DSZ-CC-0547-2009": 19
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-CC-PP-0035": 1,
          "BSI-CC-PP-0035-2007": 3
        }
      },
      "cc_sar": {
        "ADV": {
          "ADV_ARC": 1,
          "ADV_ARC.1": 1,
          "ADV_FSP": 1,
          "ADV_FSP.1": 1,
          "ADV_FSP.2": 1,
          "ADV_FSP.3": 1,
          "ADV_FSP.4": 1,
          "ADV_FSP.5": 1,
          "ADV_FSP.6": 1,
          "ADV_IMP": 1,
          "ADV_IMP.1": 1,
          "ADV_IMP.2": 1,
          "ADV_INT": 1,
          "ADV_INT.1": 1,
          "ADV_INT.2": 1,
          "ADV_INT.3": 1,
          "ADV_SPM": 1,
          "ADV_SPM.1": 1,
          "ADV_TDS": 1,
          "ADV_TDS.1": 1,
          "ADV_TDS.2": 1,
          "ADV_TDS.3": 1,
          "ADV_TDS.4": 1,
          "ADV_TDS.5": 1,
          "ADV_TDS.6": 1
        },
        "AGD": {
          "AGD_OPE": 1,
          "AGD_OPE.1": 1,
          "AGD_PRE": 1,
          "AGD_PRE.1": 1
        },
        "ALC": {
          "ALC_CMC": 2,
          "ALC_CMC.1": 1,
          "ALC_CMC.2": 1,
          "ALC_CMC.3": 1,
          "ALC_CMC.4": 2,
          "ALC_CMC.5": 1,
          "ALC_CMS": 1,
          "ALC_CMS.1": 1,
          "ALC_CMS.2": 1,
          "ALC_CMS.3": 1,
          "ALC_CMS.4": 1,
          "ALC_CMS.5": 2,
          "ALC_DEL": 1,
          "ALC_DEL.1": 2,
          "ALC_DVS": 1,
          "ALC_DVS.1": 2,
          "ALC_DVS.2": 6,
          "ALC_FLR": 1,
          "ALC_FLR.1": 1,
          "ALC_FLR.2": 1,
          "ALC_FLR.3": 1,
          "ALC_LCD.1": 2,
          "ALC_LCD.2": 1,
          "ALC_TAT": 1,
          "ALC_TAT.1": 1,
          "ALC_TAT.2": 2,
          "ALC_TAT.3": 1
        },
        "APE": {
          "APE_CCL.1": 1,
          "APE_ECD.1": 1,
          "APE_INT.1": 1,
          "APE_OBJ.1": 1,
          "APE_OBJ.2": 1,
          "APE_REQ.1": 1,
          "APE_REQ.2": 1,
          "APE_SPD.1": 1
        },
        "ASE": {
          "ASE_CCL": 1,
          "ASE_CCL.1": 1,
          "ASE_ECD": 1,
          "ASE_ECD.1": 1,
          "ASE_INT": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ": 1,
          "ASE_OBJ.1": 1,
          "ASE_OBJ.2": 1,
          "ASE_REQ.1": 1,
          "ASE_REQ.2": 1,
          "ASE_SPD": 1,
          "ASE_SPD.1": 1,
          "ASE_TSS": 1,
          "ASE_TSS.1": 1,
          "ASE_TSS.2": 1
        },
        "ATE": {
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