ST19WR66D microcontroller

CSV information

Status archived
Valid from 18.11.2005
Valid until 01.09.2019
Scheme 🇫🇷 FR
Manufacturer STMicroelectronics
Category ICs, Smart Cards and Smart Card-Related Devices and Systems
Security level ALC_DVS.2, EAL5+, AVA_VLA.4, AVA_MSU.3

Heuristics summary

Certificate ID: ANSSI-CC-2005/39

Certificate

certificate could not be downloaded, no link is available.

Certification report

Extracted keywords

Symmetric Algorithms
AES, DES

Vendor
STMicroelectronics, STM

Security level
EAL5, EAL7, EAL4, EAL51, EAL1, EAL3, EAL5+, ITSEC E6 and
Security Assurance Requirements (SAR)
ACM_SCP.3, ACM_AUT.1, ACM_CAP.4, ACM_AUT, ACM_CAP, ACM_SCP, ADO_IGS.1, ADO_DEL.2, ADO_DEL, ADO_IGS, ADV_FSP.3, ADV_HLD.3, ADV_IMP.2, ADV_INT.1, ADV_RCR.2, ADV_SPM.3, ADV_LLD.1, ADV_FSP, ADV_HLD, ADV_IMP, ADV_INT, ADV_LLD, ADV_RCR, ADV_SPM, AGD_ADM.1, AGD_USR.1, AGD_ADM, AGD_USR, ALC_DVS.2, ALC_LCD.2, ALC_TAT.2, ALC_FLR, ALC_DVS, ALC_TAT, ATE_DPT.2, ATE_COV.2, ATE_FUN.1, ATE_IND.2, ATE_COV, ATE_DPT, ATE_FUN, ATE_IND, AVA_MSU.3, AVA_VLA.4, AVA_CCA.1, AVA_SOF.1, AVA_CCA, AVA_MSU, AVA_SOF, AVA_VLA, ASE_DES.1, ASE_ENV.1, ASE_INT.1, ASE_OBJ.1, ASE_PPC.1, ASE_REQ.1, ASE_SRE.1, ASE_TSS.1
Security Functional Requirements (SFR)
FAU_SAA.1, FAU_SAS.1, FCS_CKM.1, FCS_COP.1, FCS_RDN.1, FDP_ACC.2, FDP_ACF.1, FDP_IFC.1, FDP_IFF.1, FDP_ITT.1, FDP_RIP.1, FDP_SDI.1, FDP_SDI.2, FIA_ATD.1, FIA_UAU.2, FIA_UID.2, FMT_MOF.1, FMT_MSA.1, FMT_MSA.3, FMT_SMF.1, FMT_SMR.1, FMT_LIM.1, FMT_LIM.2, FPR_UNO.1, FPT_FLS.1, FPT_ITT.1, FPT_PHP.2, FPT_PHP.3, FPT_SEP.1, FPT_TST.1, FRU_FLT.2
Protection profiles
BSI-PP-002-2001
Certificates
Rapport de certification 2003/18, Rapport de certification 2004/18, Certification Report 2005/39
Evaluation facilities
Serma Technologies

Standards
FIPS 140-2, AIS34, AIS31, CCIMB-2004-01-001, CCIMB-2004-01-002, CCIMB-2004-01-003, CCIMB-2004-01-004

File metadata

Title Certification Report 2005/39
Subject ST19WR66D microcontroller
Keywords CER/F/07.3
Author DCSSI
Creation date D:20051219173210+01'00'
Modification date D:20051219173214+01'00'
Pages 24
Creator Acrobat PDFMaker 5.0 pour Word
Producer Acrobat Distiller 5.0 (Windows)

References

Outgoing Incoming

Security target

Extracted keywords

Symmetric Algorithms
AES, AES-128, DES, DEA, 3DES
Asymmetric Algorithms
ECC
Hash functions
SHA-1
Schemes
MAC
Randomness
RND
Block cipher modes
ECB, CBC

Vendor
Infineon Technologies, STMicroelectronics, STM, Philips

Security level
EAL5, EAL 5, EAL 5 augmented
Claims
O.TAMPER, O.CLON, O.OPERATE, O.RND, O.FLAW, O.DIS_MECHANISM, O.DIS_MEMORY, O.MOD_MEMORY, O.DEV_DIS, O.SOFT_DLV, O.SOFT_MECH, O.DEV_TOOLS, O.SOFT_ACS, O.DESIGN_ACS, O.DSOFT_ACS, O.MECH_ACS, O.TI_ACS, O.MASK_FAB, O.TOE_PRT, O.IC_DLV, O.DLV_PROTECT, O.DLV_AUDIT, O.DLV_RESP, O.TEST_OPERATE, O.USE_DIAG, O.USE_SYS, T.CLON, T.DIS_SOFT, T.DIS_DSOFT, T.RND, T.DIS_DESIGN, T.MOD_SOFT, T.MOD_DSOFT, T.MOD_DESIGN, T.DIS_INFO, T.DIS_DEL, T.DIS_TEST, T.DIS_TOOLS, T.DIS_PHOTOMASK, T.T_DEL, T.T_SAMPLE, T.T_PHOTOMASK, T.T_PRODUCT, T.MOD_DEL, T.MOD_PHOTOMASK, A.SOFT_ARCHI, A.DEV_ORG, A.DLV_PROTECT, A.DLV_AUDIT, A.DLV_RESP, A.USE_TEST, A.USE_PROD, A.USE_DIAG, A.USE_SYS
Security Assurance Requirements (SAR)
ACM_AUT.1, ACM_CAP.4, ACM_SCP.3, ACM_SCP, ACM_CAP, ADO_DEL.2, ADO_IGS.1, ADO_DEL, ADO_IGS, ADV_SPM.3, ADV_FSP.3, ADV_HLD.3, ADV_INT.1, ADV_LLD.1, ADV_IMP.2, ADV_RCR.2, ADV_FSP, AGD_USR.1, AGD_ADM.1, AGD_USR, AGD_ADM, ALC_DVS.2, ALC_LCD.2, ALC_TAT.2, ALC_DVS, ATE_COV.2, ATE_DPT.2, ATE_FUN.1, ATE_IND.2, ATE_COV, AVA_MSU.3, AVA_VLA.4, AVA_CCA.1, AVA_SOF.1
Security Functional Requirements (SFR)
FAU_SAS, FAU_SAS.1, FAU_SAA.1, FCS_COP.1, FCS_CKM.1, FCS_RND, FCS_RND.1, FCS_CKM.4, FCS_CKM.2, FDP_SDI.1, FDP_ACC.2, FDP_ACF.1, FDP_SDI.2, FDP_ITT.1, FDP_IFC.1, FDP_IFF.1, FDP_RIP.1, FDP_ITC.1, FIA_ATD.1, FIA_UID.2, FIA_UAU.2, FMT_MOF.1, FMT_MSA.3, FMT_MSA.1, FMT_LIM, FMT_SMR.1, FMT_SMF.1, FMT_LIM.1, FMT_LIM.2, FMT_MSA.2, FPR_UNO.1, FPT_TST.1, FPT_FLS.1, FPT_SEP.1, FPT_PHP.2, FPT_PHP.3, FPT_ITT.1, FRU_FLT.2
Protection profiles
BSI-PP-002-2001, BSI-PP-002-2001/PP/9806, BSI-PP-0002-2001

Side-channel analysis
Leak-Inherent, Physical Probing, physical probing, DPA, SPA, Physical tampering, physical tampering, Malfunction, malfunction

Standards
FIPS PUB 197, FIPS PUB 186, BSI-AIS31, ISO/IEC 9796-, ISO/IEC 10116:1997, ISO/IEC 9797:1994, CCIMB-2004-01-002, CCIMB-2004-01-003, CCIMB-2004-01-001

File metadata

Title ST_ST19WR66V1_2.fm
Author Christiane DROULERS
Creation date D:20050119135501Z
Modification date D:20050927152131+02'00'
Pages 61
Creator FrameMaker 7.0
Producer Acrobat Distiller 6.0 (Windows)

Heuristics

Automated inference - use with caution

All attributes shown in this section (e.g., links between certificates, products, vendors, and known CVEs) are generated by automated heuristics and have not been reviewed by humans. These methods can produce false positives or false negatives and should not be treated as definitive without independent verification. For details on our data sources and inference methods, see our methodology. If you believe any information here is inaccurate or harmful, please submit feedback.

Certificate ID

ANSSI-CC-2005/39

Extracted SARs

ADV_FSP.3, ADV_HLD.3, ADV_IMP.2, ADV_INT.1, ADV_LLD.1, ADV_RCR.2, ADV_SPM.3, AGD_ADM.1, AGD_USR.1, ALC_DVS.2, ALC_LCD.2, ALC_TAT.2, ASE_DES.1, ASE_ENV.1, ASE_INT.1, ASE_OBJ.1, ASE_PPC.1, ASE_REQ.1, ASE_SRE.1, ASE_TSS.1, ATE_COV.2, ATE_DPT.2, ATE_FUN.1, ATE_IND.2, AVA_CCA.1, AVA_MSU.3, AVA_SOF.1, AVA_VLA.4

Similar certificates

Name Certificate ID
ST19WR66I secure microcontroller ANSSI-CC-2006/18 Compare

References

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Raw data

{
  "_type": "sec_certs.sample.cc.CCCertificate",
  "category": "ICs, Smart Cards and Smart Card-Related Devices and Systems",
  "cert_link": null,
  "dgst": "0cb12081b81b9742",
  "heuristics": {
    "_type": "sec_certs.sample.cc.CCCertificate.Heuristics",
    "annotated_references": null,
    "cert_id": "ANSSI-CC-2005/39",
    "cert_lab": null,
    "cpe_matches": null,
    "direct_transitive_cves": null,
    "eal": "EAL5+",
    "extracted_sars": {
      "_type": "Set",
      "elements": [
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_REQ",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_LLD",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_OBJ",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_SRE",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_TAT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_ENV",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_FUN",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_SOF",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_HLD",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_DVS",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_DES",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_FSP",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_RCR",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_IND",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ALC_LCD",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_MSU",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_INT",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_PPC",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_SPM",
          "level": 3
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_CCA",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_DPT",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AVA_VLA",
          "level": 4
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ATE_COV",
          "level": 2
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ASE_TSS",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_USR",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "AGD_ADM",
          "level": 1
        },
        {
          "_type": "sec_certs.sample.sar.SAR",
          "family": "ADV_IMP",
          "level": 2
        }
      ]
    },
    "extracted_versions": {
      "_type": "Set",
      "elements": [
        "-"
      ]
    },
    "indirect_transitive_cves": null,
    "next_certificates": null,
    "prev_certificates": null,
    "protection_profiles": null,
    "related_cves": null,
    "report_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2006/02",
          "ANSSI-CC-2005/41",
          "ANSSI-CC-2005/40"
        ]
      },
      "directly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2003/18"
        ]
      },
      "indirectly_referenced_by": {
        "_type": "Set",
        "elements": [
          "BSI-DSZ-CC-0373-2007",
          "ANSSI-CC-2006/02",
          "ANSSI-CC-2005/41",
          "ANSSI-CC-2005/40"
        ]
      },
      "indirectly_referencing": {
        "_type": "Set",
        "elements": [
          "ANSSI-CC-2003/18"
        ]
      }
    },
    "scheme_data": null,
    "st_references": {
      "_type": "sec_certs.sample.certificate.References",
      "directly_referenced_by": null,
      "directly_referencing": null,
      "indirectly_referenced_by": null,
      "indirectly_referencing": null
    },
    "verified_cpe_matches": null
  },
  "maintenance_updates": {
    "_type": "Set",
    "elements": []
  },
  "manufacturer": "STMicroelectronics",
  "manufacturer_web": "https://www.st.com/",
  "name": "ST19WR66D microcontroller",
  "not_valid_after": "2019-09-01",
  "not_valid_before": "2005-11-18",
  "pdf_data": {
    "_type": "sec_certs.sample.cc.CCCertificate.PdfData",
    "cert_filename": null,
    "cert_frontpage": null,
    "cert_keywords": null,
    "cert_metadata": null,
    "report_filename": "dcssi_2005-39en.pdf",
    "report_frontpage": {
      "FR": {}
    },
    "report_keywords": {
      "asymmetric_crypto": {},
      "cc_cert_id": {
        "AU": {
          "Certification Report 2005/39": 13
        },
        "FR": {
          "Certification Report 2005/39": 13,
          "Rapport de certification 2003/18": 1,
          "Rapport de certification 2004/18": 1
        }
      },
      "cc_claims": {},
      "cc_protection_profile_id": {
        "BSI": {
          "BSI-PP-002-2001": 1
        }
      },
      "cc_sar": {
        "ACM": {
          "ACM_AUT": 1,
          "ACM_AUT.1": 3,
          "ACM_CAP": 1,
          "ACM_CAP.4": 3,
          "ACM_SCP": 1,
          "ACM_SCP.3": 3
        },
        "ADO": {
          "ADO_DEL": 1,
          "ADO_DEL.2": 3,
          "ADO_IGS": 1,
          "ADO_IGS.1": 2
        },
        "ADV": {
          "ADV_FSP": 1,
          "ADV_FSP.3": 3,
          "ADV_HLD": 1,
          "ADV_HLD.3": 3,
          "ADV_IMP": 1,
          "ADV_IMP.2": 3,
          "ADV_INT": 1,
          "ADV_INT.1": 3,
          "ADV_LLD": 1,
          "ADV_LLD.1": 1,
          "ADV_RCR": 1,
          "ADV_RCR.2": 3,
          "ADV_SPM": 1,
          "ADV_SPM.3": 3
        },
        "AGD": {
          "AGD_ADM": 1,
          "AGD_ADM.1": 1,
          "AGD_USR": 1,
          "AGD_USR.1": 1
        },
        "ALC": {
          "ALC_DVS": 1,
          "ALC_DVS.2": 7,
          "ALC_FLR": 2,
          "ALC_LCD.2": 3,
          "ALC_TAT": 1,
          "ALC_TAT.2": 3
        },
        "ASE": {
          "ASE_DES.1": 1,
          "ASE_ENV.1": 1,
          "ASE_INT.1": 1,
          "ASE_OBJ.1": 1,
          "ASE_PPC.1": 1,
          "ASE_REQ.1": 1,
          "ASE_SRE.1": 1,
          "ASE_TSS.1": 1
        },
        "ATE": {
          "ATE_COV": 1,
          "ATE_COV.2": 1,
          "ATE_DPT": 1,
          "ATE_DPT.2": 3,
          "ATE_FUN": 1,
          "ATE_FUN.1": 1,
          "ATE_IND": 1,
          "ATE_IND.2": 1
        },
        "AVA": {
          "AVA_CCA": 1,
          "AVA_CCA.1": 3,
          "AVA_MSU": 1,
          "AVA_MSU.3": 5,
          "AVA_SOF": 1,
          "AVA_SOF.1": 1,
          "AVA_VLA": 1,
          "AVA_VLA.4": 5
        }
      },
      "cc_security_level": {
        "EAL": {
          "EAL1": 1,
          "EAL3": 1,
          "EAL4": 2,
          "EAL5": 4,
          "EAL5+": 1,
          "EAL51": 1,
          "EAL7": 2
        },
        "ITSEC": {
          "ITSEC E6 and": 1
        }
      },
      "cc_sfr": {
        "FAU": {
          "FAU_SAA.1": 1,
          "FAU_SAS.1": 1
        },
        "FCS": {
          "FCS_CKM.1": 1,
          "FCS_COP.1": 1,
          "FCS_RDN.1": 1
        },
        "FDP": {
          "FDP_ACC.2": 1,
          "FDP_ACF.1": 1,
          "FDP_IFC.1": 1,
          "FDP_IFF.1": 1,
          "FDP_ITT.1": 1,
          "FDP_RIP.1": 1,
          "FDP_SDI.1": 1,
          "FDP_SDI.2": 1
        },
        "FIA": {
          "FIA_ATD.1": 1,
          "FIA_UAU.2": 1,
          "FIA_UID.2": 1
        },
        "FMT": {
          "FMT_LIM.1": 1,
          "FMT_LIM.2": 1,
          "FMT_MOF.1": 1,
          "FMT_MSA.1": 1,
          "FMT_MSA.3": 1,
          "FMT_SMF.1": 1,
          "FMT_SMR.1": 1
        },
        "FPR": {
          "FPR_UNO.1": 1
        },
        "FPT": {
          "FPT_FLS.1": 1,
          "FPT_ITT.1": 1,
          "FPT_PHP.2": 1,
          "FPT_PHP.3": 1,
          "FPT_SEP.1": 1,
          "FPT_TST.1": 1
        },
        "FRU": {
          "FRU_FLT.2": 1
        }
      },
      "certification_process": {},
      "cipher_mode": {},
      "cplc_data": {},
      "crypto_engine": {},
      "crypto_library": {},
      "crypto_protocol": {},
      "crypto_scheme": {},
      "device_model": {},
      "ecc_curve": {},
      "eval_facility": {
        "Serma": {
          "Serma Technologies": 4
        }
      },
      "hash_function": {},
      "ic_data_group": {},
      "javacard_api_const": {},
      "javacard_packages": {},
      "javacard_version": {},
      "os_name": {},
      "pq_crypto": {},
      "randomness": {},
      "side_channel_analysis": {},
      "standard_id": {
        "BSI": {
          "AIS31": 7,
          "AIS34": 3
        },
        "CC": {
          "CCIMB-2004-01-001": 1,
          "CCIMB-2004-01-002": 1,
          "CCIMB-2004-01-003": 1,
          "CCIMB-2004-01-004": 1
        },
        "FIPS": {
          "FIPS 140-2": 4
        }
      },
      "symmetric_crypto": {
        "AES_competition": {
          "AES": {
            "AES": 2
          }
        },
        "DES": {
          "DES": {
            "DES": 3
          }
        }
      },
      "technical_report_id": {},
      "tee_name": {},
      "tls_cipher_suite": {},
      "vendor": {
        "STMicroelectronics": {
          "STM": 10,
          "STMicroelectronics": 33
        }
      },
      "vulnerability": {}
    },
    "report_metadata": {
      "/Author": "DCSSI",
      "/CreationDate": "D:20051219173210+01\u002700\u0027",
      "/Creator": "Acrobat PDFMaker 5.0 pour Word",
      "/Keywords": "CER/F/07.3",
      "/ModDate": "D:20051219173214+01\u002700\u0027",
      "/Producer": "Acrobat Distiller 5.0 (Windows)",
      "/Subject": "ST19WR66D microcontroller",
      "/Title": "Certification Report 2005/39",
      "pdf_file_size_bytes": 670222,
      "pdf_hyperlinks": {
        "_type": "Set",
        "elements": []
      },
      "pdf_is_encrypted": true,
      "pdf_number_of_pages": 24
    },
    "st_filename": "dcssi-cible_2005-39en.pdf",
    "st_frontpage": null,
    "st_keywords": {
      "asymmetric_crypto": {
        "ECC": {
          "ECC": {
            "ECC": 1
          }
        }
      },
      "cc_cert_id": {},
      "cc_claims": {
        "A": {
          "A.DEV_ORG": 1,
          "A.DLV_AUDIT": 1,
          "A.DLV_PROTECT": 1,
          "A.DLV_RESP": 1,
          "A.SOFT_ARCHI": 1,
          "A.USE_DIAG": 1,
          "A.USE_PROD": 1,
          "A.USE_SYS": 1,
          "A.USE_TEST": 1
        },
        "O": {
          "O.CLON": 1,
          "O.DESIGN_ACS": 1,
          "O.DEV_DIS": 1,
          "O.DEV_TOOLS": 1,
          "O.DIS_MECHANISM": 1,
          "O.DIS_MEMORY": 1,
          "O.DLV_AUDIT": 1,
          "O.DLV_PROTECT": 1,
          "O.DLV_RESP": 1,
          "O.DSOFT_ACS": 1,
          "O.FLAW": 1,
          "O.IC_DLV": 1,
          "O.MASK_FAB": 1,
          "O.MECH_ACS": 1,
          "O.MOD_MEMORY": 1,
          "O.OPERATE": 1,
          "O.RND": 1,
          "O.SOFT_ACS": 1,
          "O.SOFT_DLV": 1,
          "O.SOFT_MECH": 1,
          "O.TAMPER": 1,
          "O.TEST_OPERATE": 1,
          "O.TI_ACS": 1,
          "O.TOE_PRT": 1,
          "O.USE_DIAG": 1,
          "O.USE_SYS": 1
        },
        "T": {
          "T.CLON": 1,
          "T.DIS_DEL": 1,
          "T.DIS_DESIGN": 1,
          "T.DIS_DSOFT": 1,
          "T.DIS_INFO": 1,
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