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Thinklogical TLX320 Matrix Switch
SERTIT-076 		ChipDoc P60 on JCOP 3 SECID P60 (OSB) ICAO BAC avec AA et CA masqué sur composant P6022J VB (version v7b4)
ANSSI-CC-2017/62
name Thinklogical TLX320 Matrix Switch ChipDoc P60 on JCOP 3 SECID P60 (OSB) ICAO BAC avec AA et CA masqué sur composant P6022J VB (version v7b4)
category Other Devices and Systems ICs, Smart Cards and Smart Card-Related Devices and Systems
scheme NO FR
not_valid_after 22.09.2021 20.11.2022
not_valid_before 22.09.2016 20.11.2017
report_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cc-2017_62fr.pdf
st_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ThinklogicalSecurityTarget_1_3_TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/anssi-cible-2017_62en.pdf
manufacturer Thinklogical NXP Semiconductors
manufacturer_web https://www.thinklogical.com/ https://www.nxp.com/
security_level EAL4 ADV_TDS.4, ALC_CMS.5, ATE_DPT.3, ADV_INT.2, ADV_FSP.5, EAL4+, ALC_DVS.2, ALC_TAT.2
dgst a67b05a18bbe6cfc f76c378955469cd4
heuristics/cert_id SERTIT-076 ANSSI-CC-2017/62
heuristics/cert_lab [] THALES
heuristics/extracted_sars ASE_INT.1, ALC_CMC.4, ASE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_TSS.1, ALC_TAT.1, ASE_SPD.1, ATE_DPT.2, ALC_DEL.1, ALC_LCD.1, AGD_OPE.1, AVA_VAN.3, AGD_PRE.1, ALC_CMS.4, ATE_FUN.1, ADV_ARC.1, ASE_OBJ.2, ADV_TDS.3, ASE_REQ.2, ALC_DVS.1, ADV_FSP.4, ATE_IND.2, ASE_CCL.1 ASE_INT.1, ALC_DVS.2, ALC_CMC.4, ASE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_TSS.1, ASE_SPD.1, ALC_CMS.5, ALC_DEL.1, ALC_LCD.1, ADV_FSP.5, AGD_OPE.1, ADV_INT.2, AVA_VAN.3, AGD_PRE.1, ATE_FUN.1, ATE_DPT.3, ADV_ARC.1, ASE_OBJ.2, ADV_TDS.4, ALC_TAT.2, ASE_REQ.2, ATE_IND.2, ASE_CCL.1
heuristics/extracted_versions - 3
heuristics/report_references/directly_referenced_by {} ANSSI-CC-2020/46
heuristics/report_references/indirectly_referenced_by {} ANSSI-CC-2020/46
heuristics/scheme_data
  • category: Other Devices and Systems
  • certification_date: 22.09.2016
  • developer: Thinklogical
  • enhanced:
    • category: Other Devices and Systems
    • cert_id: SERTIT-076
    • certification_date: 22.09.2016
    • description: The TOE provides remote connections from a set of shared computers to a set of shared peripherals. The switching capability of the TOE is used to connect ports on a particular computer to a particular peripheral set. The corresponding electronic signal from a computer port is transformed into an optical signal by the Velocity extender, transmitted through an optical fiber, switched by the TOE to another optical fiber, and then transformed back to an electronic form by the Velocity extender. The resulting signal is used by the shared peripherals. The TOE provides a capability to dynamically change the switching configuration to connect a particular computer to a particular peripheral set. The TOE enforces secure separation of information flows corresponding to different switched connections. The corresponding Data Separation Security Policy is the main security feature of the TOE.
    • developer: Thinklogical
    • documents: frozendict({'cert': [frozendict({'href': 'https://sertit.no/getfile.php/135040-1607952626/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20C%20v1.0.pdf'})], 'target': [frozendict({'href': 'https://sertit.no/getfile.php/135043-1607952629/SERTIT/Sertifikater/2016/76/ThinklogicalSecurityTarget_1_3_TLX320.pdf'})], 'report': [frozendict({'href': 'https://sertit.no/getfile.php/135046-1607952632/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf'})]})
    • evaluation_facility: Norconsult AS
    • level: EAL 4
    • mutual_recognition: CCRA, SOG-IS
    • product: TLX320 Matrix Switch Chassis (TLX-MSC-000320 Rev A), TLX48 / TLX320 Matrix Switch Data Input and Output Card, 16 Ports, SFP+, Multi-Mode (TLX-MSD-M00016 Rev A), Single Mode (TLX-MSDS00016 Rev A), Velocity Matrix Switch 320 Data Input Retimer Card, 16 Ports, SFP+, Multi-Mode (VXM-D00T16 Rev A), Single Mode (VXM-D0ST16 Rev A)
  • product: Thinklogical TLX320 Matrix Switch
  • url: https://sertit.no/certified-products/product-archive/thinklogical-tlx320-matrix-switch
heuristics/st_references/directly_referencing {} BSI-DSZ-CC-0897-V2-2014
heuristics/st_references/indirectly_referencing {} BSI-DSZ-CC-0897-V2-2014
pdf_data/report_filename 20160922 Sertit-076 CR v1.0 Certification Report TLX320.pdf anssi-cc-2017_62fr.pdf
pdf_data/report_frontpage
  • FR:
  • FR:
    • cc_security_level: EAL 4 augmenté ADV_FSP.5, ADV_INT.2, ADV_TDS.4, ALC_CMS.5, ALC_DVS.2, ALC_TAT.2, ATE_DPT.3
    • cc_version: Critères Communs version 3.1 révision 4
    • cert_id: ANSSI-CC-2017/62
    • cert_item: ChipDoc P60 on JCOP 3 SECID P60 (OSB) ICAO BAC avec AA et CA masqué sur composant P6022J VB
    • cert_item_version: Version v7b4
    • cert_lab: THALES (TCS – CNES) 290 allée du Lac, 31670 Labège, France
    • developer: NXP Semiconductors GmbH Stresemannallee 101, 22529 Hamburg, Allemagne Commanditaire NXP Semiconductors GmbH Stresemannallee 101, 22529 Hamburg, Allemagne
    • match_rules: ['Référence du rapport de certification(.+)Nom du produit(.+)Référence/version du produit(.+)Conformité à un profil de protection(.+)Critères d’évaluation et version(.+)Niveau d’évaluation(.+)Développeur (.+)Centre d’évaluation(.+)Accords de reconnaissance applicables']
    • ref_protection_profiles: BSI-CC-PP-0055, [PP BAC], version 1.10 Machine Readable Travel Document with ICAO application, Basic Access Control
pdf_data/report_keywords/cc_cert_id
  • NO:
    • SERTIT-076: 16
  • FR:
    • ANSSI-CC-2017/62: 16
    • ANSSI-PP-2010-03-M1: 1
  • NL:
    • NSCIB-CC-15-67206-CR: 1
    • NSCIB-CC-98209-CR: 1
pdf_data/report_keywords/cc_protection_profile_id
  • BSI:
    • BSI-CC-PP-0055: 1
    • BSI-PP-0055-2009: 1
pdf_data/report_keywords/cc_security_level
  • EAL:
    • EAL 2: 1
    • EAL 4: 19
    • EAL1: 1
    • EAL7: 1
  • EAL:
    • EAL 1: 1
    • EAL 3: 1
    • EAL 4: 1
    • EAL 5: 1
    • EAL 7: 1
    • EAL2: 2
    • EAL4: 1
    • EAL5: 1
    • EAL7: 1
  • ITSEC:
    • ITSEC E6 Elevé: 1
pdf_data/report_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 1
    • ADV_FSP.4: 1
    • ADV_IMP.1: 1
    • ADV_TDS.3: 1
  • AGD:
    • AGD_OPE.1: 1
    • AGD_PRE.1: 1
  • ALC:
    • ALC_CMC.4: 1
    • ALC_CMS.4: 1
    • ALC_DEL.1: 1
    • ALC_DVS.1: 1
    • ALC_FLR: 1
    • ALC_LCD.1: 1
    • ALC_TAT.1: 1
  • ASE:
    • ASE_CCL.1: 1
    • ASE_ECD.1: 1
    • ASE_INT.1: 1
    • ASE_OBJ.2: 1
    • ASE_REQ.2: 1
    • ASE_SPD.1: 1
    • ASE_TSS.1: 1
  • ATE:
    • ATE_COV.2: 1
    • ATE_DPT.1: 1
    • ATE_FUN.1: 1
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.3: 1
  • ADV:
    • ADV_ARC: 1
    • ADV_FSP: 1
    • ADV_FSP.5: 2
    • ADV_IMP: 1
    • ADV_INT: 1
    • ADV_INT.2: 2
    • ADV_SPM: 1
    • ADV_TDS: 1
    • ADV_TDS.4: 2
  • AGD:
    • AGD_OPE: 2
    • AGD_PRE: 3
  • ALC:
    • ALC_CMC: 1
    • ALC_CMS: 1
    • ALC_CMS.5: 2
    • ALC_DEL: 1
    • ALC_DVS: 1
    • ALC_DVS.2: 3
    • ALC_FLR: 2
    • ALC_TAT: 1
    • ALC_TAT.2: 2
  • ASE:
    • ASE_CCL: 1
    • ASE_ECD: 1
    • ASE_INT: 1
    • ASE_OBJ: 1
    • ASE_REQ: 1
    • ASE_SPD: 1
    • ASE_TSS: 1
    • ASE_TSS.2: 1
  • ATE:
    • ATE_COV: 1
    • ATE_DPT: 1
    • ATE_DPT.3: 2
    • ATE_FUN: 1
    • ATE_IND: 1
  • AVA:
    • AVA_VAN: 2
    • AVA_VAN.3: 2
    • AVA_VAN.5: 1
pdf_data/report_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 1
    • FDP_IFC.1: 1
    • FDP_IFF.1: 1
    • FDP_ITC.1: 1
pdf_data/report_keywords/cc_claims
  • A:
    • A.EMISSIO: 1
    • A.MANAGE: 1
    • A.NOEVIL: 1
    • A.PHYSICAL: 1
    • A.SCENARIO: 1
  • O:
    • O.CONF: 1
    • O.CONNECT: 1
  • OE:
    • OE.EMISSIO: 1
    • OE.MANAGE: 1
    • OE.NOEVIL: 1
    • OE.PHYSICAL: 1
    • OE.SCENARIO: 1
  • T:
    • T.ATTACK: 1
    • T.INSTALL: 1
    • T.RESIDUAL: 1
    • T.STATE: 1
pdf_data/report_keywords/vendor
  • Microsoft:
    • Microsoft: 3
  • NXP:
    • NXP: 15
    • NXP Semiconductors: 2
pdf_data/report_keywords/eval_facility
  • Norconsult:
    • Norconsult AS: 1
pdf_data/report_keywords/symmetric_crypto
  • DES:
    • DES:
      • DES: 1
pdf_data/report_keywords/os_name
  • JCOP:
    • JCOP 3: 23
    • JCOP3: 1
pdf_data/report_keywords/standard_id
  • CC:
    • CCMB-2012-09-001: 1
    • CCMB-2012-09-002: 1
    • CCMB-2012-09-003: 1
    • CCMB-2012-09-004: 1
  • ISO:
    • ISO/IEC 15408: 4
  • CC:
    • CCMB-2012-09-001: 1
    • CCMB-2012-09-002: 1
    • CCMB-2012-09-003: 1
    • CCMB-2012-09-004: 1
  • ICAO:
    • ICAO: 24
pdf_data/report_metadata
  • /AAPL:Keywords: ['ugradert']
  • /Author: Rage, Arne Høye
  • /CreationDate: D:20160922162516Z00'00'
  • /Creator: Microsoft Word
  • /Keywords: ugradert
  • /ModDate: D:20160922162516Z00'00'
  • /Producer: Mac OS X 10.11.6 Quartz PDFContext
  • /Title: tittel
  • pdf_file_size_bytes: 875983
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 17
  • /Category: Référence, Version
  • /Comments: NXP Semiconductors GmbH
  • /Company: SGDSN/ANSSI
  • /CreationDate: D:20171124102641+01'00'
  • /Creator: Acrobat PDFMaker 11 pour Word
  • /Keywords: ANSSI-CC-CER-F-07.025
  • /ModDate: D:20171127145355+01'00'
  • /Producer: Adobe PDF Library 11.0
  • /SourceModified: D:20171124092627
  • /Subject:
  • /Title:
  • pdf_file_size_bytes: 194387
  • pdf_hyperlinks: http://www.ssi.gouv.fr/, mailto:[email protected]
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 15
pdf_data/st_filename ThinklogicalSecurityTarget_1_3_TLX320.pdf anssi-cible-2017_62en.pdf
pdf_data/st_keywords/cc_cert_id
  • DE:
    • BSI-DSZ-CC-0897-V2-2014: 1
    • BSI-DSZ-CC-0973: 1
  • NL:
    • NSCIB-CC-15-67206: 1
    • NSCIB-CC-16-98209: 1
pdf_data/st_keywords/cc_protection_profile_id
  • BSI:
    • BSI-CC-PP-0055-2009: 1
    • BSI-CC-PP0055: 1
    • BSI-CC-PP0056-V2-2012: 1
    • BSI-PP-0035-2007: 1
pdf_data/st_keywords/cc_security_level
  • EAL:
    • EAL 4: 1
    • EAL4: 7
  • EAL:
    • EAL 4: 3
    • EAL 4 augmented: 3
    • EAL 4+: 2
    • EAL4: 7
    • EAL4 augmented: 1
    • EAL4+: 1
pdf_data/st_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 2
    • ADV_FSP.4: 2
    • ADV_IMP.1: 2
    • ADV_TDS.3: 2
  • AGD:
    • AGD_OPE.1: 2
    • AGD_PRE.1: 2
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS.4: 2
    • ALC_DEL.1: 2
    • ALC_DVS.1: 2
    • ALC_LCD.1: 2
    • ALC_TAT.1: 2
  • ATE:
    • ATE_COV.2: 2
    • ATE_DPT.2: 2
    • ATE_FUN.1: 2
    • ATE_IND.2: 2
  • AVA:
    • AVA_VAN.3: 2
  • ADV:
    • ADV_ARC.1: 6
    • ADV_FSP.5: 11
    • ADV_IMP.1: 7
    • ADV_INT.2: 6
    • ADV_TDS.4: 15
  • AGD:
    • AGD_OPE.1: 4
    • AGD_PRE.1: 4
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS.5: 5
    • ALC_DEL.1: 2
    • ALC_DVS.2: 8
    • ALC_LCD.1: 3
    • ALC_TAT.1: 1
    • ALC_TAT.2: 8
  • ASE:
    • ASE_CCL: 2
    • ASE_CCL.1: 2
    • ASE_ECD: 3
    • ASE_ECD.1: 1
    • ASE_INT: 2
    • ASE_INT.1: 4
    • ASE_OBJ: 2
    • ASE_OBJ.2: 3
    • ASE_REQ: 2
    • ASE_REQ.2: 4
    • ASE_SPD: 2
    • ASE_SPD.1: 1
    • ASE_TSS: 2
    • ASE_TSS.1: 2
  • ATE:
    • ATE_COV.2: 4
    • ATE_DPT.3: 5
    • ATE_FUN.1: 5
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.3: 2
pdf_data/st_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 7
    • FDP_ETC.1.1: 1
    • FDP_ETC.1.2: 1
    • FDP_IFC.1: 7
    • FDP_IFC.1.1: 1
    • FDP_IFF.1: 7
    • FDP_IFF.1.1: 1
    • FDP_IFF.1.2: 1
    • FDP_IFF.1.3: 1
    • FDP_IFF.1.4: 1
    • FDP_IFF.1.5: 1
    • FDP_ITC.1: 7
    • FDP_ITC.1.1: 1
    • FDP_ITC.1.2: 1
    • FDP_ITC.1.3: 1
  • FMT:
    • FMT_MSA.3: 3
  • FAU:
    • FAU_GEN: 1
    • FAU_SAS: 7
    • FAU_SAS.1: 12
    • FAU_SAS.1.1: 2
  • FCS:
    • FCS_CKM: 11
    • FCS_CKM.1: 15
    • FCS_CKM.4: 12
    • FCS_CKM.4.1: 1
    • FCS_COP: 39
    • FCS_COP.1: 8
    • FCS_RND: 8
    • FCS_RND.1: 15
    • FCS_RND.1.1: 2
  • FDP:
    • FDP_ACC.1: 7
    • FDP_ACC.1.1: 1
    • FDP_ACF: 1
    • FDP_ACF.1: 9
    • FDP_ACF.1.1: 1
    • FDP_ACF.1.2: 2
    • FDP_ACF.1.3: 1
    • FDP_ACF.1.4: 2
    • FDP_ITC: 2
    • FDP_UCT.1: 11
    • FDP_UCT.1.1: 1
    • FDP_UIT.1: 10
    • FDP_UIT.1.1: 1
    • FDP_UIT.1.2: 1
  • FIA:
    • FIA_AFL.1: 6
    • FIA_AFL.1.1: 1
    • FIA_AFL.1.2: 1
    • FIA_API: 7
    • FIA_API.1: 12
    • FIA_API.1.1: 2
    • FIA_SOS.2: 1
    • FIA_UAU.1: 6
    • FIA_UAU.1.1: 1
    • FIA_UAU.1.2: 1
    • FIA_UAU.4: 15
    • FIA_UAU.4.1: 1
    • FIA_UAU.5: 9
    • FIA_UAU.5.1: 1
    • FIA_UAU.5.2: 3
    • FIA_UAU.6: 11
    • FIA_UAU.6.1: 1
    • FIA_UID.1: 7
    • FIA_UID.1.1: 1
    • FIA_UID.1.2: 1
  • FMT:
    • FMT_LIM: 8
    • FMT_LIM.1: 18
    • FMT_LIM.1.1: 3
    • FMT_LIM.2: 17
    • FMT_LIM.2.1: 4
    • FMT_MSA.1: 1
    • FMT_MSA.3: 1
    • FMT_MTD: 18
    • FMT_MTD.1: 7
    • FMT_SMF.1: 11
    • FMT_SMF.1.1: 1
    • FMT_SMR.1: 13
    • FMT_SMR.1.1: 1
    • FMT_SMR.1.2: 1
  • FPT:
    • FPT_FLS.1: 7
    • FPT_FLS.1.1: 1
    • FPT_PHP.3: 7
    • FPT_PHP.3.1: 1
    • FPT_RVM.1: 1
    • FPT_SEP.1: 1
    • FPT_TST.1: 7
    • FPT_TST.1.1: 1
    • FPT_TST.1.2: 1
    • FPT_TST.1.3: 1
  • FTP:
    • FTP_ITC.1: 1
    • FTP_TRP.1: 1
pdf_data/st_keywords/cc_claims
  • A:
    • A.ACCESS: 1
    • A.EMISSION: 2
    • A.MANAGE: 2
    • A.NOEVIL: 2
    • A.PHYSICAL: 2
    • A.SCENARIO: 2
  • O:
    • O.CONF: 7
    • O.CONNECT: 3
    • O.CRYPTOGRAPHY: 1
  • OE:
    • OE.EMISSION: 2
    • OE.INSTAL: 1
    • OE.MANAGE: 4
    • OE.NOEVIL: 2
    • OE.PHYSICAL: 2
    • OE.SCENARIO: 2
  • T:
    • T.ATTACK: 3
    • T.COMINT: 1
    • T.INSTALL: 3
    • T.RESIDUAL: 3
    • T.STATE: 3
  • OE:
    • OE.MRTD_: 1
pdf_data/st_keywords/vendor
  • NXP:
    • NXP: 96
    • NXP Semiconductors: 21
pdf_data/st_keywords/symmetric_crypto
  • AES_competition:
    • AES:
      • AES: 1
  • DES:
    • 3DES:
      • TDES: 13
    • DES:
      • DES: 4
  • constructions:
    • MAC:
      • KMAC: 1
pdf_data/st_keywords/asymmetric_crypto
  • FF:
    • DH:
      • Diffie-Hellman: 1
pdf_data/st_keywords/hash_function
  • SHA:
    • SHA1:
      • SHA-1: 2
    • SHA2:
      • SHA-224: 1
      • SHA-256: 1
pdf_data/st_keywords/crypto_scheme
  • MAC:
    • MAC: 8
pdf_data/st_keywords/crypto_protocol
  • PACE:
    • PACE: 1
pdf_data/st_keywords/randomness
  • RNG:
    • RND: 1
pdf_data/st_keywords/cipher_mode
  • CBC:
    • CBC: 3
pdf_data/st_keywords/crypto_engine
  • SmartMX:
    • SmartMX2: 3
pdf_data/st_keywords/crypto_library
  • Generic:
    • Crypto Library ................8: 1
pdf_data/st_keywords/side_channel_analysis
  • FI:
    • Malfunction: 3
    • Physical Tampering: 5
    • Physical tampering: 1
    • fault injection: 1
    • malfunction: 7
    • physical tampering: 1
  • SCA:
    • DPA: 3
    • SPA: 1
    • physical probing: 4
    • timing attacks: 1
  • other:
    • reverse engineering: 1
pdf_data/st_keywords/technical_report_id
  • BSI:
    • BSI TR-03110: 1
pdf_data/st_keywords/os_name
  • JCOP:
    • JCOP 3: 7
    • JCOP3: 81
pdf_data/st_keywords/ic_data_group
  • EF:
    • EF.COM: 7
    • EF.DG1: 26
    • EF.DG13: 3
    • EF.DG14: 2
    • EF.DG15: 4
    • EF.DG16: 26
    • EF.DG2: 10
    • EF.DG3: 9
    • EF.DG4: 8
    • EF.DG5: 9
    • EF.SOD: 7
pdf_data/st_keywords/standard_id
  • BSI:
    • AIS31: 1
  • CC:
    • CCMB-2012-09-004: 1
  • FIPS:
    • FIPS 180-2: 1
    • FIPS 46-3: 2
    • FIPS PUB 180-2: 1
    • FIPS PUB 46-3: 1
  • ICAO:
    • ICAO: 102
  • ISO:
    • ISO/IEC 14443: 4
    • ISO/IEC 7816: 2
    • ISO/IEC 7816-2: 1
    • ISO/IEC 7816-4: 1
    • ISO/IEC 9796-2: 2
  • PKCS:
    • PKCS#1: 1
  • RFC:
    • RFC3369: 1
pdf_data/st_metadata
  • /Author: MICHELE ROBERTS
  • /CreationDate: D:20160922164335+00'00'
  • /Creator: Microsoft Word
  • /ModDate: D:20160922164335+00'00'
  • /Title:
  • pdf_file_size_bytes: 487151
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 22
  • /CreationDate: D:20171031105040+01'00'
  • /Creator: Microsoft® Word 2013
  • /ModDate: D:20171127145445+01'00'
  • /Producer: Microsoft® Word 2013
  • /Title:
  • pdf_file_size_bytes: 1466943
  • pdf_hyperlinks: mailto:[email protected], http://www.nxp.com/
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 80
state/report/pdf_hash Different Different
state/report/txt_hash Different Different
state/st/pdf_hash Different Different
state/st/txt_hash Different Different