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Thinklogical TLX320 Matrix Switch
SERTIT-076 		Renesas RS45C integrated circuit version 01
BSI-DSZ-CC-0541-2010
name Thinklogical TLX320 Matrix Switch Renesas RS45C integrated circuit version 01
category Other Devices and Systems ICs, Smart Cards and Smart Card-Related Devices and Systems
scheme NO DE
not_valid_after 22.09.2021 01.09.2019
not_valid_before 22.09.2016 14.07.2010
report_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0541a_pdf.pdf
st_link https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ThinklogicalSecurityTarget_1_3_TLX320.pdf https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0541b_pdf.pdf
manufacturer Thinklogical Renesas Electronics Corporation
manufacturer_web https://www.thinklogical.com/ https://am.renesas.com/
security_level EAL4 ALC_DVS.2, EAL5+, AVA_VAN.5
dgst a67b05a18bbe6cfc c6c6e8e89eaf001b
heuristics/cert_id SERTIT-076 BSI-DSZ-CC-0541-2010
heuristics/cert_lab [] BSI
heuristics/extracted_sars ASE_INT.1, ALC_CMC.4, ASE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_TSS.1, ALC_TAT.1, ASE_SPD.1, ATE_DPT.2, ALC_DEL.1, ALC_LCD.1, AGD_OPE.1, AVA_VAN.3, AGD_PRE.1, ALC_CMS.4, ATE_FUN.1, ADV_ARC.1, ASE_OBJ.2, ADV_TDS.3, ASE_REQ.2, ALC_DVS.1, ADV_FSP.4, ATE_IND.2, ASE_CCL.1 ASE_INT.1, ALC_DVS.2, ALC_CMC.4, ASE_ECD.1, APE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_SPD.1, ALC_CMS.5, AVA_VAN.5, ALC_DEL.1, ALC_LCD.1, ALC_FLR.3, ADV_FSP.5, AGD_OPE.1, ADV_INT.2, AGD_PRE.1, ATE_FUN.1, APE_REQ.2, ATE_DPT.3, ADV_ARC.1, ASE_OBJ.2, APE_CCL.1, ALC_TAT.2, ASE_TSS.2, ADV_TDS.4, ASE_REQ.2, APE_INT.1, APE_SPD.1, ATE_IND.2, APE_OBJ.2, ASE_CCL.1, ADV_SPM.1
heuristics/extracted_versions - 01
heuristics/report_references/directly_referenced_by {} BSI-DSZ-CC-0697-2011
heuristics/report_references/indirectly_referenced_by {} BSI-DSZ-CC-0697-2011, BSI-DSZ-CC-0774-2011, BSI-DSZ-CC-0735-2011, BSI-DSZ-CC-0705-2011
heuristics/scheme_data
  • category: Other Devices and Systems
  • certification_date: 22.09.2016
  • developer: Thinklogical
  • enhanced:
    • category: Other Devices and Systems
    • cert_id: SERTIT-076
    • certification_date: 22.09.2016
    • description: The TOE provides remote connections from a set of shared computers to a set of shared peripherals. The switching capability of the TOE is used to connect ports on a particular computer to a particular peripheral set. The corresponding electronic signal from a computer port is transformed into an optical signal by the Velocity extender, transmitted through an optical fiber, switched by the TOE to another optical fiber, and then transformed back to an electronic form by the Velocity extender. The resulting signal is used by the shared peripherals. The TOE provides a capability to dynamically change the switching configuration to connect a particular computer to a particular peripheral set. The TOE enforces secure separation of information flows corresponding to different switched connections. The corresponding Data Separation Security Policy is the main security feature of the TOE.
    • developer: Thinklogical
    • documents: frozendict({'cert': [frozendict({'href': 'https://sertit.no/getfile.php/135040-1607952626/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20C%20v1.0.pdf'})], 'target': [frozendict({'href': 'https://sertit.no/getfile.php/135043-1607952629/SERTIT/Sertifikater/2016/76/ThinklogicalSecurityTarget_1_3_TLX320.pdf'})], 'report': [frozendict({'href': 'https://sertit.no/getfile.php/135046-1607952632/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf'})]})
    • evaluation_facility: Norconsult AS
    • level: EAL 4
    • mutual_recognition: CCRA, SOG-IS
    • product: TLX320 Matrix Switch Chassis (TLX-MSC-000320 Rev A), TLX48 / TLX320 Matrix Switch Data Input and Output Card, 16 Ports, SFP+, Multi-Mode (TLX-MSD-M00016 Rev A), Single Mode (TLX-MSDS00016 Rev A), Velocity Matrix Switch 320 Data Input Retimer Card, 16 Ports, SFP+, Multi-Mode (VXM-D00T16 Rev A), Single Mode (VXM-D0ST16 Rev A)
  • product: Thinklogical TLX320 Matrix Switch
  • url: https://sertit.no/certified-products/product-archive/thinklogical-tlx320-matrix-switch
heuristics/protection_profiles {} f6d23054061d72ba
protection_profile_links {} https://www.commoncriteriaportal.org/nfs/ccpfiles/files/ppfiles/pp0035b.pdf
pdf_data/report_filename 20160922 Sertit-076 CR v1.0 Certification Report TLX320.pdf 0541a_pdf.pdf
pdf_data/report_frontpage
  • DE:
  • DE:
    • cert_id: BSI-DSZ-CC-0541-2010
    • cert_item: Renesas RS45C integrated circuit version 01
    • cert_lab: BSI
    • developer: Renesas Electronics Corporation
    • match_rules: ['(BSI-DSZ-CC-.+?) (?:for|For) (.+?) from (.*)']
pdf_data/report_keywords/cc_cert_id
  • NO:
    • SERTIT-076: 16
  • DE:
    • BSI-DSZ-CC-0541: 2
    • BSI-DSZ-CC-0541-2010: 16
pdf_data/report_keywords/cc_protection_profile_id
  • BSI:
    • BSI-CC-PP-0035: 1
    • BSI-CC-PP-0035-: 1
    • BSI-CC-PP-0035-2007: 2
pdf_data/report_keywords/cc_security_level
  • EAL:
    • EAL 2: 1
    • EAL 4: 19
    • EAL1: 1
    • EAL7: 1
  • EAL:
    • EAL 4: 5
    • EAL 5: 4
    • EAL 5 augmented: 3
    • EAL1: 7
    • EAL2: 3
    • EAL3: 4
    • EAL4: 8
    • EAL5: 6
    • EAL5+: 1
    • EAL6: 4
    • EAL7: 4
  • ITSEC:
    • ITSEC Evaluation: 1
pdf_data/report_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 1
    • ADV_FSP.4: 1
    • ADV_IMP.1: 1
    • ADV_TDS.3: 1
  • AGD:
    • AGD_OPE.1: 1
    • AGD_PRE.1: 1
  • ALC:
    • ALC_CMC.4: 1
    • ALC_CMS.4: 1
    • ALC_DEL.1: 1
    • ALC_DVS.1: 1
    • ALC_FLR: 1
    • ALC_LCD.1: 1
    • ALC_TAT.1: 1
  • ASE:
    • ASE_CCL.1: 1
    • ASE_ECD.1: 1
    • ASE_INT.1: 1
    • ASE_OBJ.2: 1
    • ASE_REQ.2: 1
    • ASE_SPD.1: 1
    • ASE_TSS.1: 1
  • ATE:
    • ATE_COV.2: 1
    • ATE_DPT.1: 1
    • ATE_FUN.1: 1
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.3: 1
  • ADV:
    • ADV_ARC: 1
    • ADV_ARC.1: 1
    • ADV_FSP: 1
    • ADV_FSP.1: 1
    • ADV_FSP.2: 1
    • ADV_FSP.3: 1
    • ADV_FSP.4: 1
    • ADV_FSP.5: 2
    • ADV_FSP.6: 1
    • ADV_IMP: 1
    • ADV_IMP.1: 1
    • ADV_IMP.2: 1
    • ADV_INT: 1
    • ADV_INT.1: 1
    • ADV_INT.2: 2
    • ADV_INT.3: 1
    • ADV_SPM: 1
    • ADV_SPM.1: 1
    • ADV_TDS: 1
    • ADV_TDS.1: 1
    • ADV_TDS.2: 1
    • ADV_TDS.3: 1
    • ADV_TDS.4: 2
    • ADV_TDS.5: 1
    • ADV_TDS.6: 1
  • AGD:
    • AGD_OPE: 1
    • AGD_OPE.1: 1
    • AGD_PRE: 1
    • AGD_PRE.1: 1
  • ALC:
    • ALC_CMC: 1
    • ALC_CMC.1: 1
    • ALC_CMC.2: 1
    • ALC_CMC.3: 1
    • ALC_CMC.4: 2
    • ALC_CMC.5: 1
    • ALC_CMS: 1
    • ALC_CMS.1: 1
    • ALC_CMS.2: 1
    • ALC_CMS.3: 1
    • ALC_CMS.4: 1
    • ALC_CMS.5: 3
    • ALC_DEL: 1
    • ALC_DEL.1: 2
    • ALC_DVS: 1
    • ALC_DVS.1: 1
    • ALC_DVS.2: 7
    • ALC_FLR: 1
    • ALC_FLR.1: 1
    • ALC_FLR.2: 1
    • ALC_FLR.3: 1
    • ALC_LCD.1: 2
    • ALC_LCD.2: 1
    • ALC_TAT: 1
    • ALC_TAT.1: 1
    • ALC_TAT.2: 3
    • ALC_TAT.3: 1
  • APE:
    • APE_CCL.1: 1
    • APE_ECD.1: 1
    • APE_INT.1: 1
    • APE_OBJ.1: 1
    • APE_OBJ.2: 1
    • APE_REQ.1: 1
    • APE_REQ.2: 1
    • APE_SPD.1: 1
  • ASE:
    • ASE_CCL: 1
    • ASE_CCL.1: 1
    • ASE_ECD: 1
    • ASE_ECD.1: 1
    • ASE_INT: 1
    • ASE_INT.1: 1
    • ASE_OBJ: 1
    • ASE_OBJ.1: 1
    • ASE_OBJ.2: 1
    • ASE_REQ.1: 1
    • ASE_REQ.2: 1
    • ASE_SPD: 1
    • ASE_SPD.1: 1
    • ASE_TSS: 1
    • ASE_TSS.1: 1
    • ASE_TSS.2: 1
  • ATE:
    • ATE_COV: 1
    • ATE_COV.1: 1
    • ATE_COV.2: 1
    • ATE_COV.3: 1
    • ATE_DPT: 1
    • ATE_DPT.1: 1
    • ATE_DPT.2: 1
    • ATE_DPT.3: 2
    • ATE_DPT.4: 1
    • ATE_FUN: 1
    • ATE_FUN.1: 1
    • ATE_FUN.2: 1
    • ATE_IND: 1
    • ATE_IND.1: 1
    • ATE_IND.2: 1
    • ATE_IND.3: 1
  • AVA:
    • AVA_VAN: 2
    • AVA_VAN.1: 1
    • AVA_VAN.2: 1
    • AVA_VAN.3: 1
    • AVA_VAN.4: 1
    • AVA_VAN.5: 6
pdf_data/report_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 1
    • FDP_IFC.1: 1
    • FDP_IFF.1: 1
    • FDP_ITC.1: 1
pdf_data/report_keywords/cc_claims
  • A:
    • A.EMISSIO: 1
    • A.MANAGE: 1
    • A.NOEVIL: 1
    • A.PHYSICAL: 1
    • A.SCENARIO: 1
  • O:
    • O.CONF: 1
    • O.CONNECT: 1
  • OE:
    • OE.EMISSIO: 1
    • OE.MANAGE: 1
    • OE.NOEVIL: 1
    • OE.PHYSICAL: 1
    • OE.SCENARIO: 1
  • T:
    • T.ATTACK: 1
    • T.INSTALL: 1
    • T.RESIDUAL: 1
    • T.STATE: 1
pdf_data/report_keywords/vendor
  • Microsoft:
    • Microsoft: 3
pdf_data/report_keywords/eval_facility
  • Norconsult:
    • Norconsult AS: 1
pdf_data/report_keywords/symmetric_crypto
  • DES:
    • DES:
      • DES: 9
pdf_data/report_keywords/randomness
  • RNG:
    • RNG: 4
pdf_data/report_keywords/side_channel_analysis
  • FI:
    • physical tampering: 1
  • SCA:
    • physical probing: 1
    • side channel: 1
    • side-channel: 1
  • other:
    • JIL: 4
    • reverse engineering: 1
pdf_data/report_keywords/technical_report_id
  • BSI:
    • BSI 7125: 2
    • BSI 7148: 1
    • BSI 7149: 1
    • BSI TR-02102: 1
pdf_data/report_keywords/standard_id
  • CC:
    • CCMB-2012-09-001: 1
    • CCMB-2012-09-002: 1
    • CCMB-2012-09-003: 1
    • CCMB-2012-09-004: 1
  • ISO:
    • ISO/IEC 15408: 4
  • BSI:
    • AIS 25: 2
    • AIS 26: 2
    • AIS 31: 2
    • AIS 32: 1
    • AIS 34: 2
    • AIS 35: 2
    • AIS 36: 3
    • AIS 37: 1
    • AIS 38: 1
pdf_data/report_keywords/certification_process
  • ConfidentialDocument:
    • 3287, 29 September 2009, RS45C Version 01 Security Target, Renesas Electronics Corporation (confidential document) [7] Security IC Platform Protection Profile, BSI-CC-PP-0035, Version 1.0, 15.06.2007, Eurosmart [8: 1
    • Version 1.0, 5. July 2010, Renesas RS45C integrated circuit version 01, T-Systems GEI GmbH, (confidential document) [10] ETR for composite evaluation according to AIS 36 for the Product Renesas RS45C integrated: 1
    • version 01, Version 1.0, 5 July 2010, ETR for composition, T- Systems GEI GmbH (confidential document) [11] Configuration list for the TOE, Revision 4203, 30 June 2010, RS45C Configuration list: 1
pdf_data/report_metadata
  • /AAPL:Keywords: ['ugradert']
  • /Author: Rage, Arne Høye
  • /CreationDate: D:20160922162516Z00'00'
  • /Creator: Microsoft Word
  • /Keywords: ugradert
  • /ModDate: D:20160922162516Z00'00'
  • /Producer: Mac OS X 10.11.6 Quartz PDFContext
  • /Title: tittel
  • pdf_file_size_bytes: 875983
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 17
  • /Author: Bundesamt für Sicherheit in der Informationstechnik
  • /CreationDate: D:20100802084552+02'00'
  • /Creator: Writer
  • /Keywords: "Renesas RS45C integrated circuit Version 01, Security Controller, Renesas Electronics Corporation, Common Criteria, Certification, Zertifzierung"
  • /ModDate: D:20100802144808+02'00'
  • /Producer: OpenOffice.org 3.1
  • /Subject: Common Criteria Certification
  • /Title: Certification Report BSI-DSZ-CC-0541-2010
  • pdf_file_size_bytes: 751259
  • pdf_hyperlinks: http://www.bsi.bund.de/
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 34
pdf_data/st_filename ThinklogicalSecurityTarget_1_3_TLX320.pdf 0541b_pdf.pdf
pdf_data/st_keywords/cc_protection_profile_id
  • BSI:
    • BSI-CC-PP-0035-2007: 1
    • BSI-PP- 0035: 4
    • BSI-PP-0035: 77
pdf_data/st_keywords/cc_security_level
  • EAL:
    • EAL 4: 1
    • EAL4: 7
  • EAL:
    • EAL 5: 1
    • EAL 5 augmented: 1
    • EAL4: 4
    • EAL4 augmented: 1
    • EAL5: 24
    • EAL5 augmented: 3
pdf_data/st_keywords/cc_sar
  • ADV:
    • ADV_ARC.1: 2
    • ADV_FSP.4: 2
    • ADV_IMP.1: 2
    • ADV_TDS.3: 2
  • AGD:
    • AGD_OPE.1: 2
    • AGD_PRE.1: 2
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS.4: 2
    • ALC_DEL.1: 2
    • ALC_DVS.1: 2
    • ALC_LCD.1: 2
    • ALC_TAT.1: 2
  • ATE:
    • ATE_COV.2: 2
    • ATE_DPT.2: 2
    • ATE_FUN.1: 2
    • ATE_IND.2: 2
  • AVA:
    • AVA_VAN.3: 2
  • ADV:
    • ADV_ARC.1: 3
    • ADV_FSP: 4
    • ADV_FSP.2: 1
    • ADV_FSP.4: 4
    • ADV_FSP.5: 4
    • ADV_IMP.1: 3
    • ADV_INT.2: 1
    • ADV_TDS.3: 1
    • ADV_TDS.4: 1
  • AGD:
    • AGD_OPE.1: 3
    • AGD_PRE.1: 3
  • ALC:
    • ALC_CMC.4: 2
    • ALC_CMS: 3
    • ALC_CMS.4: 4
    • ALC_CMS.5: 5
    • ALC_DEL.1: 2
    • ALC_DVS.1: 1
    • ALC_DVS.2: 7
    • ALC_LCD.1: 1
    • ALC_TAT.2: 1
  • ATE:
    • ATE_COV.2: 2
    • ATE_DPT.3: 1
    • ATE_FUN.1: 1
    • ATE_IND.2: 1
  • AVA:
    • AVA_VAN.5: 10
pdf_data/st_keywords/cc_sfr
  • FDP:
    • FDP_ETC.1: 7
    • FDP_ETC.1.1: 1
    • FDP_ETC.1.2: 1
    • FDP_IFC.1: 7
    • FDP_IFC.1.1: 1
    • FDP_IFF.1: 7
    • FDP_IFF.1.1: 1
    • FDP_IFF.1.2: 1
    • FDP_IFF.1.3: 1
    • FDP_IFF.1.4: 1
    • FDP_IFF.1.5: 1
    • FDP_ITC.1: 7
    • FDP_ITC.1.1: 1
    • FDP_ITC.1.2: 1
    • FDP_ITC.1.3: 1
  • FMT:
    • FMT_MSA.3: 3
  • FAU:
    • FAU_GEN: 1
    • FAU_GEN.1: 1
    • FAU_SAS: 3
    • FAU_SAS.1: 11
    • FAU_SAS.1.1: 1
  • FCS:
    • FCS_CKM.1: 6
    • FCS_CKM.4: 5
    • FCS_COP: 1
    • FCS_COP.1: 14
    • FCS_COP.1.1: 2
    • FCS_RNG: 5
    • FCS_RNG.1: 8
    • FCS_RNG.1.1: 1
    • FCS_RNG.1.2: 1
  • FDP:
    • FDP_ACC.1: 3
    • FDP_ACF: 1
    • FDP_IFC.1: 18
    • FDP_IFC.1.1: 1
    • FDP_IFF.1: 3
    • FDP_ITC.1: 6
    • FDP_ITC.2: 5
    • FDP_ITT.1: 11
    • FDP_ITT.1.1: 1
  • FMT:
    • FMT_LIM: 4
    • FMT_LIM.1: 10
    • FMT_LIM.1.1: 1
    • FMT_LIM.2: 10
    • FMT_LIM.2.1: 1
    • FMT_MSA.2: 2
    • FMT_MSA.3: 1
  • FPT:
    • FPT_FLS.1: 23
    • FPT_FLS.1.1: 1
    • FPT_ITT.1: 9
    • FPT_ITT.1.1: 1
    • FPT_PHP.3: 11
    • FPT_PHP.3.1: 1
    • FPT_TDC: 1
  • FRU:
    • FRU_FLT.1: 1
    • FRU_FLT.2: 14
    • FRU_FLT.2.1: 1
  • FTP:
    • FTP_ITC: 1
    • FTP_TRP.1: 1
pdf_data/st_keywords/cc_claims
  • A:
    • A.ACCESS: 1
    • A.EMISSION: 2
    • A.MANAGE: 2
    • A.NOEVIL: 2
    • A.PHYSICAL: 2
    • A.SCENARIO: 2
  • O:
    • O.CONF: 7
    • O.CONNECT: 3
    • O.CRYPTOGRAPHY: 1
  • OE:
    • OE.EMISSION: 2
    • OE.INSTAL: 1
    • OE.MANAGE: 4
    • OE.NOEVIL: 2
    • OE.PHYSICAL: 2
    • OE.SCENARIO: 2
  • T:
    • T.ATTACK: 3
    • T.COMINT: 1
    • T.INSTALL: 3
    • T.RESIDUAL: 3
    • T.STATE: 3
  • O:
    • O.RND: 4
  • T:
    • T.RND: 4
pdf_data/st_keywords/vendor
  • Infineon:
    • Infineon Technologies: 1
  • Philips:
    • Philips: 1
pdf_data/st_keywords/symmetric_crypto
  • DES:
    • 3DES:
      • 3DES: 22
    • DES:
      • DES: 32
pdf_data/st_keywords/randomness
  • PRNG:
    • PRNG: 2
  • RNG:
    • RND: 8
    • RNG: 17
pdf_data/st_keywords/cipher_mode
  • CBC:
    • CBC: 2
  • ECB:
    • ECB: 3
pdf_data/st_keywords/side_channel_analysis
  • FI:
    • DFA: 2
    • Malfunction: 18
    • malfunction: 4
  • SCA:
    • Leak-Inherent: 17
    • Physical Probing: 2
    • Physical probing: 1
    • physical probing: 4
  • other:
    • reverse engineering: 1
pdf_data/st_keywords/standard_id
  • BSI:
    • AIS 20: 1
    • AIS 31: 1
    • AIS20: 1
    • AIS31: 5
  • FIPS:
    • FIPS PUB 46-3: 4
  • ISO:
    • ISO/IEC7816-3: 1
pdf_data/st_metadata
  • /Author: MICHELE ROBERTS
  • /CreationDate: D:20160922164335+00'00'
  • /Creator: Microsoft Word
  • /ModDate: D:20160922164335+00'00'
  • /Title:
  • pdf_file_size_bytes: 487151
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: False
  • pdf_number_of_pages: 22
  • /Author: Renesas Electronics Corporation
  • /CreationDate: D:20100604050018Z
  • /Keywords: S45C, Common Criteria Certification, Security Controller, Security Target, EAL4+
  • /ModDate: D:20100604141448+09'00'
  • /Producer: Acrobat Distiller 5.0 (Windows)
  • /Subject: Common Criteria Certification BSI-DSZ-CC-0604-2010
  • /Title: RS45C Version 01 Security Target -Public Version-
  • pdf_file_size_bytes: 254465
  • pdf_hyperlinks: {}
  • pdf_is_encrypted: True
  • pdf_number_of_pages: 55
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