name |
Thinklogical TLX320 Matrix Switch |
Crypto Library V2.6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B |
category |
Other Devices and Systems |
ICs, Smart Cards and Smart Card-Related Devices and Systems |
scheme |
NO |
DE |
status |
archived |
archived |
not_valid_after |
22.09.2021 |
01.09.2019 |
not_valid_before |
22.09.2016 |
07.01.2011 |
cert_link |
None |
None |
report_link |
https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf |
https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0710a_pdf.pdf |
st_link |
https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/ThinklogicalSecurityTarget_1_3_TLX320.pdf |
https://www.commoncriteriaportal.org/nfs/ccpfiles/files/epfiles/0710b_pdf.pdf |
manufacturer |
Thinklogical |
NXP Semiconductors |
manufacturer_web |
https://www.thinklogical.com/ |
https://www.nxp.com/ |
security_level |
EAL4 |
ALC_DVS.2, EAL5+, AVA_VAN.5 |
dgst |
a67b05a18bbe6cfc |
60367531791af0ca |
heuristics/cert_id |
SERTIT-076 |
BSI-DSZ-CC-0710-2010 |
heuristics/cert_lab |
[] |
BSI |
heuristics/cpe_matches |
{} |
{} |
heuristics/verified_cpe_matches |
{} |
{} |
heuristics/related_cves |
{} |
{} |
heuristics/direct_transitive_cves |
{} |
{} |
heuristics/indirect_transitive_cves |
{} |
{} |
heuristics/extracted_sars |
ASE_INT.1, ALC_CMC.4, ASE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_TSS.1, ALC_TAT.1, ASE_SPD.1, ATE_DPT.2, ALC_DEL.1, ALC_LCD.1, AGD_OPE.1, AVA_VAN.3, AGD_PRE.1, ALC_CMS.4, ATE_FUN.1, ADV_ARC.1, ASE_OBJ.2, ADV_TDS.3, ASE_REQ.2, ALC_DVS.1, ADV_FSP.4, ATE_IND.2, ASE_CCL.1 |
ASE_INT.1, ALC_DVS.2, ALC_CMC.4, ASE_ECD.1, APE_ECD.1, ADV_IMP.1, ATE_COV.2, ASE_TSS.1, ASE_SPD.1, ALC_CMS.5, AVA_VAN.5, ALC_DEL.1, ALC_LCD.1, ALC_FLR.3, ADV_FSP.5, AGD_OPE.1, ADV_INT.2, AGD_PRE.1, ATE_FUN.1, APE_REQ.2, ATE_DPT.3, ADV_ARC.1, ASE_OBJ.2, APE_CCL.1, ALC_TAT.2, ADV_TDS.4, ASE_REQ.2, APE_INT.1, APE_SPD.1, ATE_IND.2, APE_OBJ.2, ASE_CCL.1, ADV_SPM.1 |
heuristics/extracted_versions |
- |
2.6 |
heuristics/prev_certificates |
{} |
{} |
heuristics/next_certificates |
{} |
{} |
heuristics/report_references/directly_referenced_by |
{} |
BSI-DSZ-CC-0797-2012, BSI-DSZ-CC-0730-2011, BSI-DSZ-CC-0798-2012, BSI-DSZ-CC-0804-2012, BSI-DSZ-CC-0799-2012 |
heuristics/report_references/directly_referencing |
{} |
BSI-DSZ-CC-0609-2010 |
heuristics/report_references/indirectly_referenced_by |
{} |
BSI-DSZ-CC-0797-2012, BSI-DSZ-CC-0730-2011, BSI-DSZ-CC-0798-2012, BSI-DSZ-CC-0804-2012, BSI-DSZ-CC-0799-2012 |
heuristics/report_references/indirectly_referencing |
{} |
BSI-DSZ-CC-0609-2010, BSI-DSZ-CC-0417-2008, BSI-DSZ-CC-0439-2008, BSI-DSZ-CC-0404-2007, BSI-DSZ-CC-0410-2007 |
heuristics/scheme_data |
- category: Other Devices and Systems
- certification_date: 22.09.2016
- developer: Thinklogical
- enhanced:
- category: Other Devices and Systems
- cert_id: SERTIT-076
- certification_date: 22.09.2016
- description: The TOE provides remote connections from a set of shared computers to a set of shared peripherals. The switching capability of the TOE is used to connect ports on a particular computer to a particular peripheral set. The corresponding electronic signal from a computer port is transformed into an optical signal by the Velocity extender, transmitted through an optical fiber, switched by the TOE to another optical fiber, and then transformed back to an electronic form by the Velocity extender. The resulting signal is used by the shared peripherals. The TOE provides a capability to dynamically change the switching configuration to connect a particular computer to a particular peripheral set. The TOE enforces secure separation of information flows corresponding to different switched connections. The corresponding Data Separation Security Policy is the main security feature of the TOE.
- developer: Thinklogical
- documents: frozendict({'cert': [frozendict({'href': 'https://sertit.no/getfile.php/135040-1607952626/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20C%20v1.0.pdf'})], 'target': [frozendict({'href': 'https://sertit.no/getfile.php/135043-1607952629/SERTIT/Sertifikater/2016/76/ThinklogicalSecurityTarget_1_3_TLX320.pdf'})], 'report': [frozendict({'href': 'https://sertit.no/getfile.php/135046-1607952632/SERTIT/Sertifikater/2016/76/20160922%20Sertit-076%20CR%20v1.0%20Certification%20Report%20TLX320.pdf'})]})
- evaluation_facility: Norconsult AS
- level: EAL 4
- mutual_recognition: CCRA, SOG-IS
- product: TLX320 Matrix Switch Chassis (TLX-MSC-000320 Rev A), TLX48 / TLX320 Matrix Switch Data Input and Output Card, 16 Ports, SFP+, Multi-Mode (TLX-MSD-M00016 Rev A), Single Mode (TLX-MSDS00016 Rev A), Velocity Matrix Switch 320 Data Input Retimer Card, 16 Ports, SFP+, Multi-Mode (VXM-D00T16 Rev A), Single Mode (VXM-D0ST16 Rev A)
- product: Thinklogical TLX320 Matrix Switch
- url: https://sertit.no/certified-products/product-archive/thinklogical-tlx320-matrix-switch
|
|
heuristics/st_references/directly_referenced_by |
{} |
BSI-DSZ-CC-0798-2012, BSI-DSZ-CC-0797-2012, BSI-DSZ-CC-0799-2012, BSI-DSZ-CC-0804-2012 |
heuristics/st_references/directly_referencing |
{} |
{} |
heuristics/st_references/indirectly_referenced_by |
{} |
BSI-DSZ-CC-0797-2012, BSI-DSZ-CC-0798-2012, BSI-DSZ-CC-0799-2012, BSI-DSZ-CC-0804-2012 |
heuristics/st_references/indirectly_referencing |
{} |
{} |
heuristics/protection_profiles |
{} |
f6d23054061d72ba |
maintenance_updates |
|
|
protection_profiles |
|
|
protection_profile_links |
{} |
https://www.commoncriteriaportal.org/nfs/ccpfiles/files/ppfiles/pp0035b.pdf |
pdf_data/cert_filename |
None |
None |
pdf_data/cert_frontpage |
|
|
pdf_data/cert_keywords/cc_cert_id |
|
|
pdf_data/cert_keywords/cc_protection_profile_id |
|
|
pdf_data/cert_keywords/cc_security_level |
|
|
pdf_data/cert_keywords/cc_sar |
|
|
pdf_data/cert_keywords/cc_sfr |
|
|
pdf_data/cert_keywords/cc_claims |
|
|
pdf_data/cert_keywords/vendor |
|
|
pdf_data/cert_keywords/eval_facility |
|
|
pdf_data/cert_keywords/symmetric_crypto |
|
|
pdf_data/cert_keywords/asymmetric_crypto |
|
|
pdf_data/cert_keywords/pq_crypto |
|
|
pdf_data/cert_keywords/hash_function |
|
|
pdf_data/cert_keywords/crypto_scheme |
|
|
pdf_data/cert_keywords/crypto_protocol |
|
|
pdf_data/cert_keywords/randomness |
|
|
pdf_data/cert_keywords/cipher_mode |
|
|
pdf_data/cert_keywords/ecc_curve |
|
|
pdf_data/cert_keywords/crypto_engine |
|
|
pdf_data/cert_keywords/tls_cipher_suite |
|
|
pdf_data/cert_keywords/crypto_library |
|
|
pdf_data/cert_keywords/vulnerability |
|
|
pdf_data/cert_keywords/side_channel_analysis |
|
|
pdf_data/cert_keywords/technical_report_id |
|
|
pdf_data/cert_keywords/device_model |
|
|
pdf_data/cert_keywords/tee_name |
|
|
pdf_data/cert_keywords/os_name |
|
|
pdf_data/cert_keywords/cplc_data |
|
|
pdf_data/cert_keywords/ic_data_group |
|
|
pdf_data/cert_keywords/standard_id |
|
|
pdf_data/cert_keywords/javacard_version |
|
|
pdf_data/cert_keywords/javacard_api_const |
|
|
pdf_data/cert_keywords/javacard_packages |
|
|
pdf_data/cert_keywords/certification_process |
|
|
pdf_data/cert_metadata |
|
|
pdf_data/report_filename |
20160922 Sertit-076 CR v1.0 Certification Report TLX320.pdf |
0710a_pdf.pdf |
pdf_data/report_frontpage |
|
- DE:
- cert_id: BSI-DSZ-CC-0710-2010
- cert_item: Crypto Library V2.6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B
- cert_lab: BSI
- developer: NXP Semiconductors Germany GmbH
- match_rules: ['(BSI-DSZ-CC-.+?) (?:for|For) (.+?) from (.*)']
|
pdf_data/report_keywords/cc_cert_id |
|
- DE:
- BSI-DSZ-CC-0609-2010: 3
- BSI-DSZ-CC-0710-2010: 20
|
pdf_data/report_keywords/cc_protection_profile_id |
|
- BSI:
- BSI-CC-PP- 0035-2007: 1
- BSI-CC-PP-0035-2007: 3
|
pdf_data/report_keywords/cc_security_level |
- EAL:
- EAL 2: 1
- EAL 4: 19
- EAL1: 1
- EAL7: 1
|
- EAL:
- EAL 1: 1
- EAL 4: 9
- EAL 5: 4
- EAL 5 augmented: 3
- EAL1: 6
- EAL2: 3
- EAL3: 4
- EAL4: 4
- EAL5: 6
- EAL5+: 1
- EAL6: 4
- EAL7: 4
- ITSEC:
|
pdf_data/report_keywords/cc_sar |
- ADV:
- ADV_ARC.1: 1
- ADV_FSP.4: 1
- ADV_IMP.1: 1
- ADV_TDS.3: 1
- AGD:
- AGD_OPE.1: 1
- AGD_PRE.1: 1
- ALC:
- ALC_CMC.4: 1
- ALC_CMS.4: 1
- ALC_DEL.1: 1
- ALC_DVS.1: 1
- ALC_FLR: 1
- ALC_LCD.1: 1
- ALC_TAT.1: 1
- ASE:
- ASE_CCL.1: 1
- ASE_ECD.1: 1
- ASE_INT.1: 1
- ASE_OBJ.2: 1
- ASE_REQ.2: 1
- ASE_SPD.1: 1
- ASE_TSS.1: 1
- ATE:
- ATE_COV.2: 1
- ATE_DPT.1: 1
- ATE_FUN.1: 1
- ATE_IND.2: 1
- AVA:
|
- ADV:
- ADV_ARC: 1
- ADV_ARC.1: 1
- ADV_FSP: 1
- ADV_FSP.1: 1
- ADV_FSP.2: 1
- ADV_FSP.3: 1
- ADV_FSP.4: 1
- ADV_FSP.5: 1
- ADV_FSP.6: 1
- ADV_IMP: 1
- ADV_IMP.1: 1
- ADV_IMP.2: 1
- ADV_INT: 1
- ADV_INT.1: 1
- ADV_INT.2: 1
- ADV_INT.3: 1
- ADV_SPM: 1
- ADV_SPM.1: 1
- ADV_TDS: 2
- ADV_TDS.1: 1
- ADV_TDS.2: 1
- ADV_TDS.3: 1
- ADV_TDS.4: 1
- ADV_TDS.5: 1
- ADV_TDS.6: 1
- AGD:
- AGD_OPE: 1
- AGD_OPE.1: 1
- AGD_PRE: 1
- AGD_PRE.1: 1
- ALC:
- ALC_CMC: 1
- ALC_CMC.1: 1
- ALC_CMC.2: 1
- ALC_CMC.3: 1
- ALC_CMC.4: 2
- ALC_CMC.5: 1
- ALC_CMS: 1
- ALC_CMS.1: 1
- ALC_CMS.2: 1
- ALC_CMS.3: 1
- ALC_CMS.4: 1
- ALC_CMS.5: 2
- ALC_DEL: 1
- ALC_DEL.1: 2
- ALC_DVS: 1
- ALC_DVS.1: 1
- ALC_DVS.2: 7
- ALC_FLR: 1
- ALC_FLR.1: 1
- ALC_FLR.2: 1
- ALC_FLR.3: 1
- ALC_LCD.1: 2
- ALC_LCD.2: 1
- ALC_TAT: 1
- ALC_TAT.1: 1
- ALC_TAT.2: 2
- ALC_TAT.3: 1
- APE:
- APE_CCL.1: 1
- APE_ECD.1: 1
- APE_INT.1: 1
- APE_OBJ.1: 1
- APE_OBJ.2: 1
- APE_REQ.1: 1
- APE_REQ.2: 1
- APE_SPD.1: 1
- ASE:
- ASE_CCL: 1
- ASE_CCL.1: 1
- ASE_ECD: 1
- ASE_ECD.1: 1
- ASE_INT: 1
- ASE_INT.1: 1
- ASE_OBJ: 1
- ASE_OBJ.1: 1
- ASE_OBJ.2: 1
- ASE_REQ.1: 1
- ASE_REQ.2: 1
- ASE_SPD: 1
- ASE_SPD.1: 1
- ASE_TSS: 1
- ASE_TSS.1: 1
- ASE_TSS.2: 1
- ATE:
- ATE_COV: 1
- ATE_COV.1: 1
- ATE_COV.2: 1
- ATE_COV.3: 1
- ATE_DPT: 1
- ATE_DPT.1: 1
- ATE_DPT.2: 1
- ATE_DPT.3: 1
- ATE_DPT.4: 1
- ATE_FUN: 1
- ATE_FUN.1: 1
- ATE_FUN.2: 1
- ATE_IND: 1
- ATE_IND.1: 1
- ATE_IND.2: 1
- ATE_IND.3: 1
- AVA:
- AVA_VAN: 2
- AVA_VAN.1: 1
- AVA_VAN.2: 1
- AVA_VAN.3: 1
- AVA_VAN.4: 1
- AVA_VAN.5: 6
|
pdf_data/report_keywords/cc_sfr |
- FDP:
- FDP_ETC.1: 1
- FDP_IFC.1: 1
- FDP_IFF.1: 1
- FDP_ITC.1: 1
|
|
pdf_data/report_keywords/cc_claims |
- A:
- A.EMISSIO: 1
- A.MANAGE: 1
- A.NOEVIL: 1
- A.PHYSICAL: 1
- A.SCENARIO: 1
- O:
- OE:
- OE.EMISSIO: 1
- OE.MANAGE: 1
- OE.NOEVIL: 1
- OE.PHYSICAL: 1
- OE.SCENARIO: 1
- T:
- T.ATTACK: 1
- T.INSTALL: 1
- T.RESIDUAL: 1
- T.STATE: 1
|
|
pdf_data/report_keywords/vendor |
|
- NXP:
- NXP: 6
- NXP Semiconductors: 9
|
pdf_data/report_keywords/eval_facility |
|
|
pdf_data/report_keywords/symmetric_crypto |
|
- AES_competition:
- DES:
- constructions:
|
pdf_data/report_keywords/asymmetric_crypto |
|
|
pdf_data/report_keywords/pq_crypto |
|
|
pdf_data/report_keywords/hash_function |
|
|
pdf_data/report_keywords/crypto_scheme |
|
|
pdf_data/report_keywords/crypto_protocol |
|
|
pdf_data/report_keywords/randomness |
|
|
pdf_data/report_keywords/cipher_mode |
|
|
pdf_data/report_keywords/ecc_curve |
|
|
pdf_data/report_keywords/crypto_engine |
|
|
pdf_data/report_keywords/tls_cipher_suite |
|
|
pdf_data/report_keywords/crypto_library |
|
|
pdf_data/report_keywords/vulnerability |
|
|
pdf_data/report_keywords/side_channel_analysis |
|
- FI:
- SCA:
- DPA: 1
- SPA: 1
- Side channel: 1
- physical probing: 1
- side channel: 1
- timing attacks: 1
- other:
|
pdf_data/report_keywords/technical_report_id |
|
- BSI:
- BSI 7125: 2
- BSI 7148: 1
- BSI 7149: 1
- BSI TR-02102: 1
|
pdf_data/report_keywords/device_model |
|
|
pdf_data/report_keywords/tee_name |
|
|
pdf_data/report_keywords/os_name |
|
|
pdf_data/report_keywords/cplc_data |
|
|
pdf_data/report_keywords/ic_data_group |
|
|
pdf_data/report_keywords/standard_id |
- CC:
- CCMB-2012-09-001: 1
- CCMB-2012-09-002: 1
- CCMB-2012-09-003: 1
- CCMB-2012-09-004: 1
- ISO:
|
- BSI:
- AIS 20: 2
- AIS 25: 2
- AIS 26: 2
- AIS 31: 3
- AIS 32: 1
- AIS 34: 2
- AIS 35: 2
- AIS 36: 5
- AIS 38: 1
- AIS36: 1
|
pdf_data/report_keywords/javacard_version |
|
|
pdf_data/report_keywords/javacard_api_const |
|
|
pdf_data/report_keywords/javacard_packages |
|
|
pdf_data/report_keywords/certification_process |
|
- ConfidentialDocument:
- / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B, Version 2.0, 16 December 2010 (confidential document) 8 specifically • AIS 20, Version 1, 2. December 1999, Funktionalitätsklassen und: 1
- 6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B, Version 2.0, 16 December 2010 (confidential document) [10] ETR for composite evaluation according to AIS 36 for the Product Crypto Library V2.6 on: 1
- V2.6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B, Rev 2.4 – 14 December 2010 (confidential document) [7] Security IC Platform Protection Profile, Version 1.0, 15 June 2007, BSI-CC-PP- 0035-2007 [8: 1
|
pdf_data/report_metadata |
- /AAPL:Keywords: ['ugradert']
- /Author: Rage, Arne Høye
- /CreationDate: D:20160922162516Z00'00'
- /Creator: Microsoft Word
- /Keywords: ugradert
- /ModDate: D:20160922162516Z00'00'
- /Producer: Mac OS X 10.11.6 Quartz PDFContext
- /Title: tittel
- pdf_file_size_bytes: 875983
- pdf_hyperlinks: {}
- pdf_is_encrypted: False
- pdf_number_of_pages: 17
|
- /Author: Bundesamt für Sicherheit in der Informationstechnik
- /CreationDate: D:20110120141220+01'00'
- /Creator: Writer
- /Keywords: "Common Criteria, Certification, Zertifizierung, NXP Semiconductors Germany GmbH, Crypto Library V2.6 on P5CD040V0B, P5CC040V0B, P5CD020V0B, P5CC021V0B, P5CD012V0B"
- /ModDate: D:20110120141746+01'00'
- /Producer: OpenOffice.org 3.1
- /Subject: Common Criteria Certification
- /Title: Certification Report BSI-DSZ-CC-0710-2010
- pdf_file_size_bytes: 933789
- pdf_hyperlinks: {}
- pdf_is_encrypted: False
- pdf_number_of_pages: 38
|
pdf_data/st_filename |
ThinklogicalSecurityTarget_1_3_TLX320.pdf |
0710b_pdf.pdf |
pdf_data/st_frontpage |
|
|
pdf_data/st_keywords/cc_cert_id |
|
- DE:
- BSI-DSZ-CC-0404: 1
- BSI-DSZ-CC-0710: 1
|
pdf_data/st_keywords/cc_protection_profile_id |
|
|
pdf_data/st_keywords/cc_security_level |
|
- EAL:
- EAL 5: 3
- EAL 5 augmented: 3
- EAL4: 1
- EAL4+: 2
- EAL5: 29
- EAL5 augmented: 1
- EAL5+: 4
|
pdf_data/st_keywords/cc_sar |
- ADV:
- ADV_ARC.1: 2
- ADV_FSP.4: 2
- ADV_IMP.1: 2
- ADV_TDS.3: 2
- AGD:
- AGD_OPE.1: 2
- AGD_PRE.1: 2
- ALC:
- ALC_CMC.4: 2
- ALC_CMS.4: 2
- ALC_DEL.1: 2
- ALC_DVS.1: 2
- ALC_LCD.1: 2
- ALC_TAT.1: 2
- ATE:
- ATE_COV.2: 2
- ATE_DPT.2: 2
- ATE_FUN.1: 2
- ATE_IND.2: 2
- AVA:
|
- ACM:
- ADV:
- ADV_ARC.1: 1
- ADV_FSP.5: 2
- ADV_IMP.1: 1
- ADV_INT.2: 1
- ADV_TDS.4: 1
- AGD:
- AGD_OPE.1: 1
- AGD_PRE.1: 1
- ALC:
- ALC_CMC.4: 1
- ALC_CMS.5: 1
- ALC_DEL.1: 1
- ALC_DVS.2: 2
- ALC_LCD.1: 1
- ALC_TAT.2: 1
- ASE:
- ASE_CCL.1: 1
- ASE_ECD.1: 1
- ASE_INT.1: 1
- ASE_OBJ.2: 1
- ASE_REQ.2: 1
- ASE_SPD.1: 1
- ASE_TSS.1: 1
- ATE:
- ATE_COV.2: 1
- ATE_DPT.3: 1
- ATE_FUN.1: 1
- ATE_IND.2: 1
- AVA:
|
pdf_data/st_keywords/cc_sfr |
- FDP:
- FDP_ETC.1: 7
- FDP_ETC.1.1: 1
- FDP_ETC.1.2: 1
- FDP_IFC.1: 7
- FDP_IFC.1.1: 1
- FDP_IFF.1: 7
- FDP_IFF.1.1: 1
- FDP_IFF.1.2: 1
- FDP_IFF.1.3: 1
- FDP_IFF.1.4: 1
- FDP_IFF.1.5: 1
- FDP_ITC.1: 7
- FDP_ITC.1.1: 1
- FDP_ITC.1.2: 1
- FDP_ITC.1.3: 1
- FMT:
|
- FAU:
- FCS:
- FCS_CKM.1: 20
- FCS_CKM.1.1: 2
- FCS_CKM.2: 2
- FCS_CKM.4: 16
- FCS_CKM.4.1: 1
- FCS_COP.1: 42
- FCS_COP.1.1: 9
- FCS_RNG.1: 12
- FCS_RNG.1.1: 2
- FCS_RNG.1.2: 2
- FDP:
- FDP_ACC.1: 6
- FDP_ACF.1: 5
- FDP_IFC.1: 24
- FDP_ITC.1: 10
- FDP_ITC.2: 10
- FDP_ITT: 1
- FDP_ITT.1: 25
- FDP_ITT.1.1: 1
- FDP_RIP: 1
- FDP_RIP.1: 6
- FDP_RIP.1.1: 1
- FMT:
- FMT_LIM.1: 2
- FMT_LIM.2: 2
- FMT_MSA.1: 5
- FMT_MSA.3: 5
- FMT_SMF.1: 3
- FPT:
- FPT_FLS.1: 18
- FPT_FLS.1.1: 1
- FPT_ITT: 1
- FPT_ITT.1: 33
- FPT_ITT.1.1: 1
- FPT_PHP.3: 7
- FRU:
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pdf_data/st_keywords/cc_claims |
- A:
- A.ACCESS: 1
- A.EMISSION: 2
- A.MANAGE: 2
- A.NOEVIL: 2
- A.PHYSICAL: 2
- A.SCENARIO: 2
- O:
- O.CONF: 7
- O.CONNECT: 3
- O.CRYPTOGRAPHY: 1
- OE:
- OE.EMISSION: 2
- OE.INSTAL: 1
- OE.MANAGE: 4
- OE.NOEVIL: 2
- OE.PHYSICAL: 2
- OE.SCENARIO: 2
- T:
- T.ATTACK: 3
- T.COMINT: 1
- T.INSTALL: 3
- T.RESIDUAL: 3
- T.STATE: 3
|
- O:
- O.AES: 5
- O.COPY: 6
- O.ECC: 5
- O.ECC_DHKE: 4
- O.HW_AES: 3
- O.MEM_ACCESS: 5
- O.MF_FW: 4
- O.REUSE: 6
- O.RND: 12
- O.RSA: 5
- O.SFR_ACCESS: 4
- O.SHA: 5
- T:
|
pdf_data/st_keywords/vendor |
|
- NXP:
- NXP: 71
- NXP Semiconductors: 30
|
pdf_data/st_keywords/eval_facility |
|
|
pdf_data/st_keywords/symmetric_crypto |
|
- AES_competition:
- DES:
- 3DES:
- 3DES: 14
- TDES: 1
- Triple-DES: 17
- DES:
- constructions:
|
pdf_data/st_keywords/asymmetric_crypto |
|
|
pdf_data/st_keywords/pq_crypto |
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|
pdf_data/st_keywords/hash_function |
|
|
pdf_data/st_keywords/crypto_scheme |
|
|
pdf_data/st_keywords/crypto_protocol |
|
|
pdf_data/st_keywords/randomness |
|
|
pdf_data/st_keywords/cipher_mode |
|
|
pdf_data/st_keywords/ecc_curve |
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|
pdf_data/st_keywords/crypto_engine |
|
|
pdf_data/st_keywords/tls_cipher_suite |
|
|
pdf_data/st_keywords/crypto_library |
|
|
pdf_data/st_keywords/vulnerability |
|
|
pdf_data/st_keywords/side_channel_analysis |
|
- FI:
- DFA: 28
- Malfunction: 13
- fault induction: 1
- fault injection: 1
- malfunction: 3
- SCA:
- DPA: 19
- Leak-Inherent: 13
- Physical Probing: 2
- SPA: 22
- Timing attacks: 4
- side channel: 14
- side-channel: 9
- timing attacks: 6
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pdf_data/st_keywords/technical_report_id |
|
|
pdf_data/st_keywords/device_model |
|
|
pdf_data/st_keywords/tee_name |
|
|
pdf_data/st_keywords/os_name |
|
|
pdf_data/st_keywords/cplc_data |
|
|
pdf_data/st_keywords/ic_data_group |
|
|
pdf_data/st_keywords/standard_id |
|
- BSI:
- CC:
- FIPS:
- FIPS 180-3: 2
- FIPS PUB 180-3: 1
- FIPS PUB 197: 3
- FIPS PUB 46-3: 2
- FIPS PUB 81: 3
- ISO:
- ISO/IEC 14888-3: 1
- ISO/IEC 9797-1: 2
- PKCS:
|
pdf_data/st_keywords/javacard_version |
|
|
pdf_data/st_keywords/javacard_api_const |
|
|
pdf_data/st_keywords/javacard_packages |
|
|
pdf_data/st_keywords/certification_process |
|
|
pdf_data/st_metadata |
- /Author: MICHELE ROBERTS
- /CreationDate: D:20160922164335+00'00'
- /Creator: Microsoft Word
- /ModDate: D:20160922164335+00'00'
- /Title:
- pdf_file_size_bytes: 487151
- pdf_hyperlinks: {}
- pdf_is_encrypted: False
- pdf_number_of_pages: 22
|
- /Alternative descriptive title: Security Target Lite
- /Author: Andreas Kühn
- /CertificationID: BSI-DSZ-CC-0710
- /Chip family: SmartMX
- /Chip type: P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B
- /Comments:
- /Company: NXP Semiconductors / Brightsight
- /Copyright date: 2010
- /CreationDate: D:20101214171516+01'00'
- /Creator: Acrobat PDFMaker 9.1 for Word
- /Descriptive title: Security Target Lite
- /Division: NXP Semiconductors
- /Keywords: Crypto Library, SmartMX, P5CD040V0B, P5CC040V0B, P5CD020V0B, P5CC021V0B, P5CD012V0B, NXP, EAL5+, AVA_VAN.5, Security Target, AES, DES, RSA, ECC over GF(p), SHA
- /ModDate: D:20101214171531+01'00'
- /Modification date: 14 December 2010
- /Producer: Adobe PDF Library 9.0
- /Revision: Rev. 2.4
- /Security status: PUBLIC INFORMATION
- /SourceModified: D:20101214161452
- /Specification status: Evaluation documentation
- /Status: accepted
- /Subject: Common Criteria Evaluation of Crypto Library on SmartMX
- /TOE long: Crypto Library V2.6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B
- /TOE short: Crypto Library on SmartMX
- /Template date: 1 October 2006
- /Template version: 2.8.1
- /Title: Security Target Lite - Crypto Library V2.6 on P5CD040V0B / P5CC040V0B / P5CD020V0B / P5CC021V0B / P5CD012V0B
- /docpath: I:\SmartMX\P5_CryptoLib\SmxCl\docs\02_sw_req_an
- /philips_smx_cl_docpath: I:\P5_CryptoLib\SmxCl\docs\02_sw_req_an
- /relBibilioPath: ..\Bibliography.doc
- pdf_file_size_bytes: 392816
- pdf_hyperlinks: mailto:[email protected]
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